Merge branch 'ldmx-dev' into pgp2fc-crc-fix

axi/axi-stream/rtl/AxiStreamResize.vhd

@@ -88,7 +88,10 @@ begin
    -- Make sure data widths are appropriate.
    assert ((SLV_BYTES_C >= MST_BYTES_C and SLV_BYTES_C mod MST_BYTES_C = 0) or
            (MST_BYTES_C >= SLV_BYTES_C and MST_BYTES_C mod SLV_BYTES_C = 0))
-      report "Data widths must be even number multiples of each other" severity failure;
+      report "Data widths must be even number multiples of each other" & LF &
+      "SLV_BYTES_C= " & integer'image(SLV_BYTES_C) & LF &
+      "MST_BYTES_C= " & integer'image(MST_BYTES_C)
+      severity failure;
 
    -- When going from a large bus to a small bus, ready is necessary
    assert (SLV_BYTES_C <= MST_BYTES_C or READY_EN_G = true)

protocols/i2c/rtl/I2cPkg.vhd

@@ -90,6 +90,7 @@ package I2cPkg is
       busReq      : sl;
       endianness  : sl;
       repeatStart : sl;
+      wrDataOnRd  : sl;
    end record;
 
    constant I2C_REG_MASTER_IN_INIT_C : I2cRegMasterInType := (
@@ -104,7 +105,8 @@ package I2cPkg is
       regReq      => '0',
       busReq      => '0',
       endianness  => '0',
-      repeatStart => '0');
+      repeatStart => '0',
+      wrDataOnRd  => '0');
 
    type I2cRegMasterInArray is array (natural range <>) of I2cRegMasterInType;
 

protocols/i2c/rtl/I2cRegMaster.vhd

@@ -166,15 +166,15 @@ begin
             v.i2cMasterIn.wrData  := regIn.regAddr(addrIndexVar+7 downto addrIndexVar);
             v.i2cMasterIn.wrValid := '1';
             -- Must drop txnReq as last byte is sent if reading
-            v.i2cMasterIn.txnReq  := not toSl(slv(r.byteCount) = regIn.regAddrSize and regIn.regOp = '0');
+            v.i2cMasterIn.txnReq  := not toSl(slv(r.byteCount) = regIn.regAddrSize and regIn.regOp = '0' and regIn.wrDataOnRd = '0');
 
             if (i2cMasterOut.wrAck = '1') then
                v.byteCount           := r.byteCount + 1;
                v.i2cMasterIn.wrValid := '0';
                if (slv(r.byteCount) = regIn.regAddrSize) then
                   -- Done sending addr
                   v.byteCount := (others => '0');
-                  if (regIn.regOp = '1') then
+                  if (regIn.regOp = '1' or (regIn.regOp = '0' and regIn.wrDataOnRd = '1')) then
                      v.state := WRITE_S;
                   else
                      v.state := READ_TXN_S;
@@ -193,7 +193,13 @@ begin
                v.byteCount           := r.byteCount + 1;
                v.i2cMasterIn.wrValid := '0';
                if (slv(r.byteCount) = regIn.regDataSize) then  -- could use rxnReq = 0
-                  v.state := REG_ACK_S;
+                  if (regIn.regOp = '1') then
+                     v.state := REG_ACK_S;
+                  else
+                     -- Handle wrDataOnRead case
+                     v.state     := READ_TXN_S;
+                  end if;
+
                end if;
             end if;
 
@@ -203,6 +209,7 @@ begin
             v.i2cMasterIn.txnReq := '1';
             v.i2cMasterIn.op     := '0';
             v.i2cMasterIn.stop   := '1';  -- i2c stop after all bytes are read
+            v.byteCount := (others => '0');                        
             v.state              := READ_S;
 
          when READ_S =>

protocols/i2c/rtl/I2cRegSlave.vhd

@@ -34,6 +34,7 @@ entity I2cRegSlave is
       -- RAM generics
       ADDR_SIZE_G          : natural                 := 2;   -- in bytes
       DATA_SIZE_G          : positive                := 1;   -- in bytes
+      ADDR_AUTO_INC_G      : boolean                 := true;
       ENDIANNESS_G         : integer range 0 to 1    := 0);  -- 0=LE, 1=BE
    port (
       sRst   : in  sl := '0';
@@ -137,8 +138,10 @@ begin
 
       -- Auto increment the address after each read or write
       -- This enables bursts.
-      if (r.wrEn = '1' or r.rdEn = '1') then
-         v.addr := r.addr + 1;
+      if (ADDR_AUTO_INC_G) then
+         if (r.wrEn = '1' or r.rdEn = '1') then
+            v.addr := r.addr + 1;
+         end if;
       end if;
 
       -- Tx Data always valid, assigned based on byte cnt

protocols/pgp/pgp4/core/rtl/Pgp4Pkg.vhd

@@ -74,6 +74,9 @@ package Pgp4Pkg is
    subtype PGP4_EOFC_BYTES_LAST_FIELD_C is natural range 15 downto 12;
    subtype PGP4_EOFC_CRC_FIELD_C is natural range 47 downto 16;
 
+   -- IEEE 802.3; CRC-32
+   -- G(X) = x^32 +x^26 +x^23 +x^22 +x^16 +x^12 +x^11 +x^10 +x^8 +x^7 +x^5 +x^4 +x^2 +x +1
+   -- https://users.ece.cmu.edu/~koopman/crc/c32/0x82608edb.txt
    constant PGP4_CRC_POLY_C : slv(31 downto 0) := X"04C11DB7";
 
    function pgp4MakeLinkInfo (
@@ -223,6 +226,8 @@ package body Pgp4Pkg is
       kCodeWord : slv(63 downto 0))
       return slv
    is
+      -- G(X) = x^8 + x^3 + x^2 + x^1 + 1
+      -- https://users.ece.cmu.edu/~koopman/crc/c08/0x83.txt
       constant CRC_POLY_C : slv(7 downto 0) := X"07";
 
       variable data : slv(55 downto 0);

python/surf/axi/_AxiVersion.py

@@ -95,6 +95,7 @@ def parseUpTime(var,read):
             base         = pr.UInt,
             mode         = 'RW',
             hidden       = True,
+            groups       = 'NoConfig'
         ))
 
         self.add(pr.RemoteCommand(
@@ -117,6 +118,7 @@ def parseUpTime(var,read):
             base         = pr.UInt,
             mode         = 'RW',
             hidden       = True,
+            groups       = 'NoConfig'            
         ))
 
         @self.command(hidden=True)
@@ -133,6 +135,7 @@ def FpgaReloadAtAddress(arg):
             bitOffset    = 0x00,
             base         = pr.UInt,
             mode         = 'RW',
+            groups       = 'NoConfig'            
         ))
 
         @self.command(description  = 'Toggle UserReset')

python/surf/xilinx/_AxiSysMonUltraScale.py

@@ -85,6 +85,7 @@ def addPair(name, offset, bitSize, units, bitOffset, description, function, poll
             bitOffset    =  0x00,
             mode         = "WO",
             hidden       =  True,
+            groups       = "NoConfig",
         ))
 
         self.add(pr.RemoteVariable(
@@ -95,6 +96,7 @@ def addPair(name, offset, bitSize, units, bitOffset, description, function, poll
             bitOffset    =  0x00,
             mode         = "WO",
             hidden       =  True,
+            groups       = "NoConfig",            
         ))
 
         self.add(pr.RemoteVariable(
@@ -105,6 +107,7 @@ def addPair(name, offset, bitSize, units, bitOffset, description, function, poll
             bitOffset    =  0x00,
             mode         = "RW",
             hidden       =  True,
+            groups       = "NoConfig",            
         ))
 
         self.add(pr.RemoteVariable(
@@ -125,6 +128,7 @@ def addPair(name, offset, bitSize, units, bitOffset, description, function, poll
             bitOffset    =  0x00,
             mode         = "RW",
             hidden       =  True,
+            groups       = "NoConfig",            
         ))
 
         ###############################################
@@ -379,6 +383,7 @@ def addPair(name, offset, bitSize, units, bitOffset, description, function, poll
             bitOffset    =  0x00,
             mode         = "RW",
             hidden       =  True,
+            groups       = "NoConfig",            
         ))
 
         self.add(pr.RemoteVariable(
@@ -389,6 +394,7 @@ def addPair(name, offset, bitSize, units, bitOffset, description, function, poll
             bitOffset    =  0x00,
             mode         = "RW",
             hidden       =  True,
+            groups       = "NoConfig",            
         ))
 
         self.addRemoteVariables(
@@ -401,6 +407,7 @@ def addPair(name, offset, bitSize, units, bitOffset, description, function, poll
             number       =  8,
             stride       =  4,
             hidden       =  True,
+            groups       = "NoConfig",            
         )
 
 #        self.addRemoteVariables(
@@ -440,6 +447,7 @@ def addPair(name, offset, bitSize, units, bitOffset, description, function, poll
             bitSize      =  12,
             bitOffset    =  0x4,
             mode         = "RW",
+            groups       = "NoConfig",            
         ))
 
         self.add(pr.LinkVariable(
@@ -459,6 +467,7 @@ def addPair(name, offset, bitSize, units, bitOffset, description, function, poll
             bitSize      =  12,
             bitOffset    =  0x4,
             mode         = "RW",
+            groups       = "NoConfig",            
         ))
 
         self.add(pr.LinkVariable(
@@ -479,6 +488,7 @@ def addPair(name, offset, bitSize, units, bitOffset, description, function, poll
             bitOffset    =  0x00,
             mode         = "RW",
             hidden       =  True,
+            groups       = "NoConfig",            
         ))
 
         self.addRemoteVariables(
@@ -491,6 +501,7 @@ def addPair(name, offset, bitSize, units, bitOffset, description, function, poll
             number       =  8,
             stride       =  4,
             hidden       =  True,
+            groups       = "NoConfig",            
         )
 
         self.addRemoteVariables(

xilinx/general/rtl/GtRxAlignCheck.vhd

@@ -118,12 +118,6 @@ architecture rtl of GtRxAlignCheck is
    signal rxClkFreq  : slv(31 downto 0);
    signal refClkFreq : slv(31 downto 0);
 
-  -- attribute dont_touch              : string;
-  -- attribute dont_touch of r         : signal is "TRUE";
-  -- attribute dont_touch of ack       : signal is "TRUE";
-  -- attribute dont_touch of txClkFreq : signal is "TRUE";
-  -- attribute dont_touch of rxClkFreq : signal is "TRUE";
-
 begin
 
    U_refClkFreq : entity surf.SyncClockFreq
@@ -179,6 +173,7 @@ begin
 
       -- Reset the flags
       v.rst         := '0';
+      v.locked      := '0';
       -- Reset the strobes
       v.rstRetryCnt := '0';
 
@@ -198,10 +193,10 @@ begin
       axiSlaveRegister (axilEp, x"104", 0,  v.last);
       axiSlaveRegisterR(axilEp, x"108", 0,  txClkFreq);
       axiSlaveRegisterR(axilEp, x"10C", 0,  rxClkFreq);
-      axiSlaveRegisterR(axilEp, x"110", 0,  v.locked);
+      axiSlaveRegisterR(axilEp, x"110", 0,  r.locked);
       axiSlaveRegister (axilEp, x"114", 0,  v.override);
       axiSlaveRegister (axilEp, x"118", 0,  v.rstRetryCnt);
-      axiSlaveRegisterR(axilEp, x"11C", 0,  v.retryCnt);
+      axiSlaveRegisterR(axilEp, x"11C", 0,  r.retryCnt);
       axiSlaveRegisterR(axilEp, x"120", 0,  refClkFreq);
 
 
@@ -212,9 +207,8 @@ begin
       case r.state is
          ----------------------------------------------------------------------
          when RESET_S =>
-            -- Set the flags
+            -- Set the flag
             v.rst    := '1';
-            v.locked := '0';
             -- Check the counter
             if (r.rstcnt = r.rstlen) then
                -- Wait for the reset transition
@@ -230,8 +224,6 @@ begin
             end if;
          ----------------------------------------------------------------------
          when READ_S =>
-            -- Reset the flag
-            v.locked := '0';
             -- Wait for the reset transition and check state of master AXI-Lite
             if (resetDone = '1') and (ack.done = '0') then
                -- Start the master AXI-Lite transaction
@@ -267,7 +259,7 @@ begin
             end if;
          ----------------------------------------------------------------------
          when LOCKED_S =>
-            -- Set the flag (can now be reset only by an external resetIn/resetErr)
+            -- Set the flag
             v.locked := '1';
       ----------------------------------------------------------------------
       end case;
@@ -278,7 +270,7 @@ begin
       end if;
 
       -- Check for user reset
-      if (resetIn = '1') or (resetErr = '1') then
+      if (resetIn = '1') or (resetErr = '1' and resetDone = '1') then
          -- Setup flags for reset state
          v.rst         := '1';
          v.req.request := '0';