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driver-minion.c
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driver-minion.c
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/*
* Copyright 2013-2014 Andrew Smith - BlackArrow Ltd
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 3 of the License, or (at your option)
* any later version. See COPYING for more details.
*/
#include "config.h"
#include "compat.h"
#include "miner.h"
#include "klist.h"
#include <ctype.h>
#include <math.h>
#ifndef LINUX
static void minion_detect(__maybe_unused bool hotplug)
{
}
#else
#include <unistd.h>
#include <linux/spi/spidev.h>
#include <sys/ioctl.h>
#include <sys/stat.h>
#include <sys/mman.h>
#include <fcntl.h>
#include <poll.h>
// Define this to 1 to enable interrupt code and enable no_nonce
#define ENABLE_INT_NONO 0
// Define this to 1 if compiling on RockChip and not on RPi
#define MINION_ROCKCHIP 0
// The code is always in - this just decides if it does it
static bool minreread = false;
#if MINION_ROCKCHIP == 1
#define MINION_POWERCYCLE_GPIO 173
#define MINION_CHIP_OFF "1"
#define MINION_CHIP_ON "0"
#define MINION_CHIP_DELAY 100
#endif
// Power cycle if the xff_list is full and the tail is less than
// this long ago
#define MINION_POWER_TIME 60
/*
* Use pins for board selection
* If disabled, it will test chips just as 'pin 0'
* but never do any gpio - the equivalent of the previous 'no pins' code
*/
static bool usepins = false;
#define MINION_PAGE_SIZE 4096
#define BCM2835_BASE 0x20000000
#define BCM2835_GPIO_BASE (BCM2835_BASE + 0x200000)
#define BCM2835_GPIO_SET0 0x001c // GPIO Pin Output Set 0
#define BCM2835_GPIO_CLR0 0x0028 // GPIO Pin Output Clear 0
#define BCM2835_GPIO_FSEL0 0x0000
#define BCM2835_GPIO_FSEL_INPUT 0b000
#define BCM2835_GPIO_FSEL_OUTPUT 0b001
#define BCM2835_GPIO_FSEL_MASK 0b111
#define BCM2835_PIN_HIGH 0x1
#define BCM2835_PIN_LOW 0x0
static const char *minion_memory = "/dev/mem";
static int minion_memory_addr = BCM2835_GPIO_BASE;
#define MINION_SPI_BUS 0
#define MINION_SPI_CHIP 0
#if MINION_ROCKCHIP == 0
#define MINION_SPI_SPEED 8000000
#else
#define MINION_SPI_SPEED 500000
#endif
#define MINION_SPI_BUFSIZ 1024
static struct minion_select_pins {
int pin;
int wpi;
char *name;
int bcm; // this is what we use
} minionPins[] = {
{ 24, 10, "CE0", 8, },
{ 26, 11, "CE1", 7, },
{ 16, 4, "GPIO4", 23, },
{ 22, 6, "GPIO6", 25, },
{ 12, 1, "GPIO1", 18, },
{ 18, 5, "GPIO5", 24, },
{ 11, 0, "GPIO0", 17, },
{ 13, 2, "GPIO2", 27, },
{ 15, 3, "GPIO3", 22, },
{ 7, 7, "GPIO7", 4, }
/* The rest on the RPi
{ 3, 8, "SDA", 2, }
{ 5, 9, "SCL", 3, }
{ 19, 12, "MOSI", 10, }
{ 21, 13, "MISO", 9, }
{ 23, 14, "SCLK", 11, }
{ 8, 15, "TxD", 14, }
{ 10, 16, "RxD", 15, }
*/
};
/*
* uS delays for GPIO pin access
*/
#define MINION_PIN_BEFORE cgsleep_us(33)
#define MINION_PIN_SLEEP cgsleep_us(133)
#define MINION_PIN_AFTER
#define MINION_PIN_COUNT (sizeof(minionPins)/ \
sizeof(struct minion_select_pins))
#define CHIP_PIN(_chip) (minioninfo->chip_pin[_chip])
#define MINION_MIN_CHIP 0
#define MINION_MAX_CHIP 11
#define MINION_CHIP_PER_PIN (1 + MINION_MAX_CHIP - MINION_MIN_CHIP)
#define MINION_CHIPS (MINION_PIN_COUNT * MINION_CHIP_PER_PIN)
#define MINION_CORES 99
#define FAKE_CORE MINION_CORES
/*
* TODO: These will need adjusting for final hardware
* Look them up and calculate them?
*/
#define MINION_QUE_MAX 64
#define MINION_QUE_HIGH 48
#define MINION_QUE_SEND 16
#define MINION_QUE_LOW 8
#define MINION_FFL " - from %s %s() line %d"
#define MINION_FFL_HERE __FILE__, __func__, __LINE__
#define MINION_FFL_PASS file, func, line
#define MINION_FFL_ARGS __maybe_unused const char *file, \
__maybe_unused const char *func, \
__maybe_unused const int line
#define minion_txrx(_task) _minion_txrx(minioncgpu, minioninfo, _task, MINION_FFL_HERE)
#define MINION_SYS_REGS 0x00
#define MINION_CORE_REGS 0x10
#define MINION_RES_BUF 0x20
#define MINION_CMD_QUE 0x30
#define MINION_NONCE_RANGES 0x70
#define DATA_SIZ (sizeof(uint32_t))
// All SYS data sizes are DATA_SIZ
#define MINION_SYS_CHIP_SIG 0x00
#define MINION_SYS_CHIP_STA 0x01
#define MINION_SYS_SPI_LED 0x02
#define MINION_SYS_TEMP_CTL 0x03
#define MINION_SYS_FREQ_CTL 0x04
#define MINION_SYS_NONCE_LED 0x05
#define MINION_SYS_MISC_CTL 0x06
#define MINION_SYS_RSTN_CTL 0x07
#define MINION_SYS_INT_ENA 0x08
#define MINION_SYS_INT_CLR 0x09
#define MINION_SYS_INT_STA 0x0a
#define MINION_SYS_FIFO_STA 0x0b
#define MINION_SYS_QUE_TRIG 0x0c
#define MINION_SYS_BUF_TRIG 0x0d
#define MINION_SYS_IDLE_CNT 0x0e
// How many 32 bit reports make up all the cores - 99 cores = 4 reps
#define MINION_CORE_REPS (int)((((MINION_CORES-1) >> 5) & 0xff) + 1)
// All SYS data sizes are DATA_SIZ
#define MINION_SYS_SIZ DATA_SIZ
// Header Pin 18 = GPIO5 = BCM 24
#define MINION_GPIO_RESULT_INT_PIN 24
// RockChip is pin 172 ...
#define MINION_GPIO_SYS "/sys/class/gpio"
#define MINION_GPIO_ENA "/export"
#define MINION_GPIO_ENA_VAL "%d"
#define MINION_GPIO_DIS "/unexport"
#define MINION_GPIO_PIN "/gpio%d"
#define MINION_GPIO_DIR "/direction"
#define MINION_GPIO_DIR_READ "in"
#define MINION_GPIO_DIR_WRITE "out"
#define MINION_GPIO_EDGE "/edge"
#define MINION_GPIO_EDGE_NONE "none"
#define MINION_GPIO_EDGE_RISING "rising"
#define MINION_GPIO_EDGE_FALLING "falling"
#define MINION_GPIO_EDGE_BOTH "both"
#define MINION_GPIO_ACT "/active_low"
#define MINION_GPIO_ACT_LO "1"
#define MINION_GPIO_ACT_HI "0"
#define MINION_GPIO_VALUE "/value"
#define MINION_RESULT_INT 0x01
#define MINION_RESULT_FULL_INT 0x02
#define MINION_CMD_INT 0x04
#define MINION_CMD_FULL_INT 0x08
#define MINION_TEMP_LOW_INT 0x10
#define MINION_TEMP_HI_INT 0x20
#define MINION_ALL_INT MINION_RESULT_INT | \
MINION_RESULT_FULL_INT | \
MINION_CMD_INT | \
MINION_CMD_FULL_INT | \
MINION_TEMP_LOW_INT | \
MINION_TEMP_HI_INT
#define RSTN_CTL_RESET_CORES 0x01
#define RSTN_CTL_FLUSH_RESULTS 0x02
#define RSTN_CTL_FLUSH_CMD_QUEUE 0x04
#define RSTN_CTL_SPI_SW_RSTN 0x08
#define RSTN_CTL_SHA_MGR_RESET 0x10
// Init
#define SYS_RSTN_CTL_INIT (RSTN_CTL_RESET_CORES | \
RSTN_CTL_FLUSH_RESULTS | \
RSTN_CTL_FLUSH_CMD_QUEUE | \
RSTN_CTL_SPI_SW_RSTN | \
RSTN_CTL_SHA_MGR_RESET)
// Block change
#define SYS_RSTN_CTL_FLUSH (RSTN_CTL_RESET_CORES | \
RSTN_CTL_SPI_SW_RSTN | \
RSTN_CTL_FLUSH_CMD_QUEUE)
#if ENABLE_INT_NONO
// enable 'no nonce' report
#define SYS_MISC_CTL_DEFAULT 0x04
#else
#define SYS_MISC_CTL_DEFAULT 0x00
#endif
// Temperature returned by MINION_SYS_CHIP_STA 0x01 STA_TEMP()
#define MINION_TEMP_40 0
#define MINION_TEMP_60 1
#define MINION_TEMP_80 3
#define MINION_TEMP_100 7
#define MINION_TEMP_OVER 15
static const char *min_temp_40 = "<40";
static const char *min_temp_60 = "40-60";
static const char *min_temp_80 = "60-80";
static const char *min_temp_100 = "80-100";
static const char *min_temp_over = ">100";
static const char *min_temp_invalid = "?";
/*
* Temperature for MINION_SYS_TEMP_CTL 0x03 temp_thres [0:3]
* i.e. it starts at 120 and goes up in steps of 5 to 160
*/
#define MINION_TEMP_CTL_MIN 1
#define MINION_TEMP_CTL_MAX 9
#define MINION_TEMP_CTL_BITS 0x0f
#define MINION_TEMP_CTL_DEF 135
#define MINION_TEMP_CTL_STEP 5
#define MINION_TEMP_CTL_MIN_VALUE 120
#define MINION_TEMP_CTL_MAX_VALUE (MINION_TEMP_CTL_MIN_VALUE + \
(MINION_TEMP_CTL_STEP * \
(MINION_TEMP_CTL_MAX - MINION_TEMP_CTL_MIN)))
#define MINION_TEMP_DISABLE "disable"
#define MINION_TEMP_CTL_DISABLE -1
#define MINION_TEMP_CTL_DISABLE_VALUE 0x20
// CORE data size is DATA_SIZ
#define MINION_CORE_ENA0_31 0x10
#define MINION_CORE_ENA32_63 0x11
#define MINION_CORE_ENA64_95 0x12
#define MINION_CORE_ENA96_98 0x13
#define MINION_CORE_ACT0_31 0x14
#define MINION_CORE_ACT32_63 0x15
#define MINION_CORE_ACT64_95 0x16
#define MINION_CORE_ACT96_98 0x17
// All CORE data sizes are DATA_SIZ
#define MINION_CORE_SIZ DATA_SIZ
#define MINION_CORE_ALL "all"
// RES data size is minion_result
#define MINION_RES_DATA 0x20
#define MINION_RES_PEEK 0x21
// QUE data size is minion_que
#define MINION_QUE_0 0x30
#define MINION_QUE_R 0x31
// RANGE data sizes are DATA_SIZ
#define MINION_NONCE_START 0x70
#define MINION_NONCE_RANGE 0x71
// This must be >= max txsiz + max rxsiz
#define MINION_BUFSIZ 1024
#define u8tou32(_c, _off) (((uint8_t *)(_c))[(_off)+0] + \
((uint8_t *)(_c))[(_off)+1] * 0x100 + \
((uint8_t *)(_c))[(_off)+2] * 0x10000 + \
((uint8_t *)(_c))[(_off)+3] * 0x1000000 )
#define MINION_ADDR_WRITE 0x7f
#define MINION_ADDR_READ 0x80
#define READ_ADDR(_reg) ((_reg) | MINION_ADDR_READ)
#define WRITE_ADDR(_reg) ((_reg) & MINION_ADDR_WRITE)
#define IS_ADDR_READ(_reg) (((_reg) & MINION_ADDR_READ) == MINION_ADDR_READ)
#define IS_ADDR_WRITE(_reg) (((_reg) & MINION_ADDR_READ) == 0)
#define SET_HEAD_WRITE(_h, _reg) ((_h)->reg) = WRITE_ADDR(_reg)
#define SET_HEAD_READ(_h, _reg) ((_h)->reg) = READ_ADDR(_reg)
#define SET_HEAD_SIZ(_h, _siz) \
do { \
((_h)->siz)[0] = (uint8_t)((_siz) & 0xff); \
((_h)->siz)[1] = (uint8_t)(((_siz) & 0xff00) >> 8); \
} while (0)
struct minion_header {
uint8_t chipid;
uint8_t reg;
uint8_t siz[2];
uint8_t data[4]; // placeholder
};
#define HSIZE() (sizeof(struct minion_header) - 4)
#define MINION_NOCHIP_SIG 0x00000000
#define MINION_NOCHIP_SIG2 0xffffffff
#define MINION_CHIP_SIG 0xb1ac8a44
/*
* Number of times to try and get the SIG with each chip,
* if the chip returns neither of the above values
* TODO: maybe need some reset between tries, to handle a shift value?
*/
#define MINION_SIG_TRIES 3
/*
* TODO: Finding these means the chip is there - but how to fix it?
* The extra &'s are to ensure there is no sign bit issue since
* the sign bit carry in a C bit-shift is compiler dependent
*/
#define MINION_CHIP_SIG_SHIFT1 (((MINION_CHIP_SIG & 0x0000ffff) << 16) & 0xffff0000)
#define MINION_CHIP_SIG_SHIFT2 (((MINION_CHIP_SIG & 0x00ffffff) << 8) & 0xffffff00)
#define MINION_CHIP_SIG_SHIFT3 (((MINION_CHIP_SIG & 0xffffff00) >> 8) & 0x00ffffff)
#define MINION_CHIP_SIG_SHIFT4 (((MINION_CHIP_SIG & 0xffff0000) >> 16) & 0x0000ffff)
#define MINION_SPI_LED_ON 0xa5a5
#define MINION_SPI_LED_OFF 0x0
// Time since first nonce/last reset before turning on the LED
#define MINION_LED_TEST_TIME 600
#define MINION_FREQ_MIN 100
#define MINION_FREQ_DEF 1200
#define MINION_FREQ_MAX 1400
#define MINION_FREQ_FACTOR 100
#define MINION_FREQ_RESET_STEP MINION_FREQ_FACTOR
#define MINION_FREQ_FACTOR_MIN 1
#define MINION_FREQ_FACTOR_MAX 14
static uint32_t minion_freq[] = {
0x0,
0x205032, // 1 = 100Mhz
0x203042, // 2 = 200Mhz
0x20204B, // 3 = 300Mhz
0x201042, // 4 = 400Mhz
0x201053, // 5 = 500Mhz
0x200032, // 6 = 600Mhz
0x20003A, // 7 = 700Mhz
0x200042, // 8 = 800Mhz
0x20004B, // 9 = 900Mhz
0x200053, // 10 = 1000Mhz
0x21005B, // 11 = 1100Mhz
0x210064, // 12 = 1200Mhz
0x21006C, // 13 = 1300Mhz
0x210074 // 14 = 1400Mhz
};
// When hash rate falls below this in the history hash rate, reset it
#define MINION_RESET_PERCENT 75.0
// When hash rate falls below this after the longer test time
#define MINION_RESET2_PERCENT 85.0
// After the above resets, delay sending work for:
#define MINION_RESET_DELAY_s 0.088
#define STA_TEMP(_sta) ((uint16_t)((_sta)[3] & 0x1f))
#define STA_CORES(_sta) ((uint16_t)((_sta)[2]))
#define STA_FREQ(_sta) ((uint32_t)((_sta)[1]) * 0x100 + (uint32_t)((_sta)[0]))
// Randomly between 1s and 2s per chip
#define MINION_STATS_UPDATE_TIME_mS 1000
#define MINION_STATS_UPDATE_RAND_mS 1000
// Don't report it more than once every ... 5s
#define MINION_IDLE_MESSAGE_ms 5000
struct minion_status {
uint16_t temp;
uint16_t cores;
uint32_t freq;
uint32_t quework;
uint32_t chipwork;
uint32_t realwork; // FIFO_STA
struct timeval last;
bool overheat;
bool islow;
bool tohigh;
int lowcount;
uint32_t overheats;
struct timeval lastoverheat;
struct timeval lastrecover;
double overheattime;
uint32_t tempsent;
uint32_t idle;
uint32_t last_rpt_idle;
struct timeval idle_rpt;
struct timeval first_nonce;
uint64_t from_first_good;
};
#define ENABLE_CORE(_core, _n) ((_core[_n >> 3]) |= (1 << (_n % 8)))
#define CORE_IDLE(_core, _n) ((_core[_n >> 3]) & (1 << (_n % 8)))
#define FIFO_RES(_fifo, _off) ((_fifo)[(_off) + 0])
#define FIFO_CMD(_fifo, _off) ((_fifo)[(_off) + 1])
#define RES_GOLD(_res) ((((_res)->status[3]) & 0x80) == 0)
#define RES_CHIPID(_res) (((_res)->status[3]) & 0x1f)
#define RES_CORE(_res) ((_res)->status[2])
#define RES_TASK(_res) ((int)((_res)->status[1]) * 0x100 + (int)((_res)->status[0]))
#define RES_NONCE(_res) u8tou32((_res)->nonce, 0)
/*
* This is only valid since we avoid using task_id 0 for work
* However, it isn't really necessary since we only request
* the number of results the result buffer says it has
* However, it is a simple failsafe
*/
#define IS_RESULT(_res) ((_res)->status[1] || (_res)->status[0])
struct minion_result {
uint8_t status[DATA_SIZ];
uint8_t nonce[DATA_SIZ];
};
#define MINION_RES_DATA_SIZ sizeof(struct minion_result)
/*
* (MINION_SPI_BUFSIZ - HSIZE()) / MINION_RES_DATA_SIZ
* less a little bit to round it out
*/
#define MINION_MAX_RES 120
#define MIDSTATE_BYTES 32
#define MERKLE7_OFFSET 64
#define MERKLE_BYTES 12
#define MINION_MAX_TASK_ID 0xffff
struct minion_que {
uint8_t task_id[2];
uint8_t reserved[2];
uint8_t midstate[MIDSTATE_BYTES];
uint8_t merkle7[DATA_SIZ];
uint8_t ntime[DATA_SIZ];
uint8_t bits[DATA_SIZ];
};
/*
* Max time to wait before checking the task list
* Required, since only urgent tasks trigger an immediate check
* TODO: ? for 2TH/s
*/
#define MINION_TASK_mS 8
/*
* Max time to wait before checking the result list for nonces
* This can be long since it's only a failsafe
* cgsem_post is always sent if there are nonces ready to check
*/
#define MINION_NONCE_mS 888
// Number of results to make a GPIO interrupt
//#define MINION_RESULT_INT_SIZE 1
#define MINION_RESULT_INT_SIZE 2
/*
* Max time to wait before checking for results
* The interrupt doesn't occur until MINION_RESULT_INT_SIZE results are found
* See comment in minion_spi_reply() at poll()
*/
#define MINION_REPLY_mS 88
/*
* Max time to wait before returning the amount of work done
* A result interrupt will send a trigger for this also
* See comment in minion_scanwork()
* This avoids the cgminer master work loop spinning doing nothing
*/
#define MINION_SCAN_mS 88
// *** Work lists: generated, queued for a chip, sent to chip
typedef struct work_item {
struct work *work;
uint32_t task_id;
struct timeval sent;
int nonces;
bool urgent;
bool stale; // if stale, don't decrement que/chipwork when discarded
bool rolled;
int errors; // uncertain since the error could mean task_id is wrong
struct timeval created; // when work was generated
uint64_t ioseq;
} WORK_ITEM;
#define ALLOC_WORK_ITEMS 4096
#define LIMIT_WORK_ITEMS 0
// *** Task queue ready to be sent
typedef struct task_item {
uint64_t tid;
uint8_t chip;
bool write;
uint8_t address;
uint32_t task_id;
uint32_t wsiz;
uint32_t osiz;
uint32_t rsiz;
uint8_t wbuf[MINION_BUFSIZ];
uint8_t obuf[MINION_BUFSIZ];
uint8_t rbuf[MINION_BUFSIZ];
int reply;
bool urgent;
uint8_t work_state;
struct work *work;
K_ITEM *witem;
uint64_t ioseq;
} TASK_ITEM;
#define ALLOC_TASK_ITEMS 256
#define LIMIT_TASK_ITEMS 0
// *** Results queue ready to be checked
typedef struct res_item {
int chip;
int core;
uint32_t task_id;
uint32_t nonce;
struct timeval when;
/*
* Only once per task_id if no nonces were found
* Sent with core = 0
* However, currently it always sends it at the end of every task
* TODO: code assumes it doesn't - change later when we
* see what the final hardware does (minor code performance gain)
*/
bool no_nonce;
// If we requested the result twice:
bool another;
uint32_t task_id2;
uint32_t nonce2;
} RES_ITEM;
#define ALLOC_RES_ITEMS 256
#define LIMIT_RES_ITEMS 0
// *** Per chip nonce history
typedef struct hist_item {
struct timeval when;
} HIST_ITEM;
#define ALLOC_HIST_ITEMS 4096
#define LIMIT_HIST_ITEMS 0
// How much history to keep (5min)
#define MINION_HISTORY_s 300
// History required to decide a reset at MINION_FREQ_DEF Mhz
#define MINION_RESET_s 10
// How many times to reset before changing Freq
// This doesn't include the secondary higher % check
#define MINION_RESET_COUNT 6
// To enable the 2nd check
static bool second_check = true;
// Longer time lapse to expect the higher %
// This intercepts a slow GHs drop earlier
#define MINION_RESET2_s 60
#if (MINION_RESET_s > MINION_HISTORY_s)
#error "MINION_RESET_s can't be greater than MINION_HISTORY_s"
#endif
#define FREQ_DELAY(freq) ((float)(MINION_RESET_s * MINION_FREQ_DEF) / (freq))
#if (MINION_RESET2_s > MINION_HISTORY_s)
#error "MINION_RESET2_s can't be greater than MINION_HISTORY_s"
#endif
// FREQ2_DELAY(MINION_FREQ_MIN) = FREQ2_FACTOR * MINION_RESET2_s
#define FREQ2_FACTOR 1.5
#define FREQ2_DELAY(freq) ((1.0 + (float)((freq - MINION_FREQ_DEF) * (1 - FREQ2_FACTOR)) / \
(float)(MINION_FREQ_DEF - MINION_FREQ_MIN)) * MINION_RESET2_s)
#if (MINION_RESET2_s <= MINION_RESET_s)
#error "MINION_RESET2_s must be greater than MINION_RESET_s"
#endif
/* If there was no reset for this long, clear the reset history
* (except the last one) since this means the current clock is ok
* with rare resets */
#define MINION_CLR_s 300
#if (MINION_CLR_s <= MINION_RESET2_s)
#error "MINION_CLR_s must be greater than MINION_RESET2_s"
#endif
// History must be always generated for the reset check
#define MINION_MAX_RESET_CHECK 2
/* Floating point reset settings required for the code to work properly
* Basically: RESET2 must be after RESET and CLR must be after RESET2 */
static void define_test()
{
float test;
if (MINION_RESET2_PERCENT <= MINION_RESET_PERCENT) {
quithere(1, "MINION_RESET2_PERCENT=%f must be "
"> MINION_RESET_PERCENT=%f",
MINION_RESET2_PERCENT, MINION_RESET_PERCENT);
}
test = FREQ_DELAY(MINION_FREQ_MIN);
if (test >= MINION_HISTORY_s) {
quithere(1, "FREQ_DELAY(MINION_FREQ_MIN)=%f must be "
"< MINION_HISTORY_s=%d",
test, MINION_HISTORY_s);
}
if (MINION_CLR_s <= test) {
quithere(1, "MINION_CLR_s=%d must be > "
"FREQ_DELAY(MINION_FREQ_MIN)=%f",
MINION_CLR_s, test);
}
if (FREQ2_FACTOR <= 1.0)
quithere(1, "FREQ2_FACTOR=%f must be > 1.0", FREQ2_FACTOR);
test = FREQ2_DELAY(MINION_FREQ_MIN);
if (test >= MINION_HISTORY_s) {
quithere(1, "FREQ2_DELAY(MINION_FREQ_MIN)=%f must be "
"< MINION_HISTORY_s=%d",
test, MINION_HISTORY_s);
}
if (MINION_CLR_s <= test) {
quithere(1, "MINION_CLR_s=%d must be > "
"FREQ2_DELAY(MINION_FREQ_MIN)=%f",
MINION_CLR_s, test);
}
}
// *** Chip freq/MHs performance history
typedef struct perf_item {
double elapsed;
uint64_t nonces;
uint32_t freq;
double ghs;
struct timeval when;
} PERF_ITEM;
#define ALLOC_PERF_ITEMS 128
#define LIMIT_PERF_ITEMS 0
// *** 0xff error history
typedef struct xff_item {
time_t when;
} XFF_ITEM;
#define ALLOC_XFF_ITEMS 100
#define LIMIT_XFF_ITEMS 100
#define DATA_WORK(_item) ((WORK_ITEM *)(_item->data))
#define DATA_TASK(_item) ((TASK_ITEM *)(_item->data))
#define DATA_RES(_item) ((RES_ITEM *)(_item->data))
#define DATA_HIST(_item) ((HIST_ITEM *)(_item->data))
#define DATA_PERF(_item) ((PERF_ITEM *)(_item->data))
#define DATA_XFF(_item) ((XFF_ITEM *)(_item->data))
// Set this to 1 to enable iostats processing
// N.B. it slows down mining
#define DO_IO_STATS 0
#if DO_IO_STATS
#define IO_STAT_NOW(_tv) cgtime(_tv)
#define IO_STAT_STORE(_sta, _fin, _lsta, _lfin, _tsd, _buf, _siz, _reply, _ioc) \
do { \
double _diff, _ldiff, _lwdiff, _1time; \
int _off; \
_diff = us_tdiff(_fin, _sta); \
_ldiff = us_tdiff(_lfin, _lsta); \
_lwdiff = us_tdiff(_sta, _lsta); \
_1time = us_tdiff(_tsd, _lfin); \
_off = (int)(_buf[1]) + (_reply >= 0 ? 0 : 0x100); \
minioninfo->summary.count++; \
minioninfo->summary.tsd += _1time; \
minioninfo->iostats[_off].count++; \
minioninfo->iostats[_off].tsd += _1time; \
if (_diff <= 0) { \
minioninfo->summary.zero_delay++; \
minioninfo->iostats[_off].zero_delay++; \
} else { \
minioninfo->summary.total_delay += _diff; \
if (minioninfo->summary.max_delay < _diff) \
minioninfo->summary.max_delay = _diff; \
if (minioninfo->summary.min_delay == 0 || \
minioninfo->summary.min_delay > _diff) \
minioninfo->summary.min_delay = _diff; \
minioninfo->iostats[_off].total_delay += _diff; \
if (minioninfo->iostats[_off].max_delay < _diff) \
minioninfo->iostats[_off].max_delay = _diff; \
if (minioninfo->iostats[_off].min_delay == 0 || \
minioninfo->iostats[_off].min_delay > _diff) \
minioninfo->iostats[_off].min_delay = _diff; \
} \
if (_ldiff <= 0) { \
minioninfo->summary.zero_dlock++; \
minioninfo->iostats[_off].zero_dlock++; \
} else { \
minioninfo->summary.total_dlock += _ldiff; \
if (minioninfo->summary.max_dlock < _ldiff) \
minioninfo->summary.max_dlock = _ldiff; \
if (minioninfo->summary.min_dlock == 0 || \
minioninfo->summary.min_dlock > _ldiff) \
minioninfo->summary.min_dlock = _ldiff; \
minioninfo->iostats[_off].total_dlock += _ldiff; \
if (minioninfo->iostats[_off].max_dlock < _ldiff) \
minioninfo->iostats[_off].max_dlock = _ldiff; \
if (minioninfo->iostats[_off].min_dlock == 0 || \
minioninfo->iostats[_off].min_dlock > _ldiff) \
minioninfo->iostats[_off].min_dlock = _ldiff; \
} \
minioninfo->summary.total_dlwait += _lwdiff; \
minioninfo->iostats[_off].total_dlwait += _lwdiff; \
if (_siz == 0) { \
minioninfo->summary.zero_bytes++; \
minioninfo->iostats[_off].zero_bytes++; \
} else { \
minioninfo->summary.total_bytes += _siz; \
if (minioninfo->summary.max_bytes < _siz) \
minioninfo->summary.max_bytes = _siz; \
if (minioninfo->summary.min_bytes == 0 || \
minioninfo->summary.min_bytes > _siz) \
minioninfo->summary.min_bytes = _siz; \
minioninfo->iostats[_off].total_bytes += _siz; \
if (minioninfo->iostats[_off].max_bytes < _siz) \
minioninfo->iostats[_off].max_bytes = _siz; \
if (minioninfo->iostats[_off].min_bytes == 0 || \
minioninfo->iostats[_off].min_bytes > _siz) \
minioninfo->iostats[_off].min_bytes = _siz; \
} \
} while (0);
typedef struct iostat {
uint64_t count; // total ioctl()
double total_delay; // total elapsed ioctl()
double min_delay;
double max_delay;
uint64_t zero_delay; // how many had <= 0 delay
// Above but including locking
double total_dlock;
double min_dlock;
double max_dlock;
uint64_t zero_dlock;
// Total time waiting to get lock
double total_dlwait;
// these 3 fields are ignored for now since all are '1'
uint64_t total_ioc; // SPI_IOC_MESSAGE(x)
uint64_t min_ioc;
uint64_t max_ioc;
uint64_t total_bytes; // ioctl() bytes
uint64_t min_bytes;
uint64_t max_bytes;
uint64_t zero_bytes; // how many had siz == 0
double tsd; // total doing one extra cgtime() each time
} IOSTAT;
#else
#define IO_STAT_NOW(_tv)
#define IO_STAT_STORE(_sta, _fin, _lsta, _lfin, _tsd, _buf, _siz, _reply, _ioc)
#endif
static double time_bands[] = { 0.1, 0.5, 1.0, 2.0, 4.0, 8.0, 16.0, 32.0 };
#define TIME_BANDS ((int)(sizeof(time_bands)/sizeof(double)))
struct minion_info {
struct thr_info *thr;
struct thr_info spiw_thr;
struct thr_info spir_thr;
struct thr_info res_thr;
pthread_mutex_t spi_lock;
pthread_mutex_t sta_lock;
cgsem_t task_ready;
cgsem_t nonce_ready;
cgsem_t scan_work;
volatile unsigned *gpio;
int spifd;
char gpiointvalue[64];
int gpiointfd;
// I/O or seconds
bool spi_reset_io;
int spi_reset_count;
time_t last_spi_reset;
uint64_t spi_resets;
// TODO: need to track disabled chips - done?
int chips;
bool has_chip[MINION_CHIPS];
int init_temp[MINION_CHIPS];
uint8_t init_cores[MINION_CHIPS][DATA_SIZ*MINION_CORE_REPS];
uint8_t chipid[MINION_CHIPS]; // Chip Number
int chip_pin[MINION_CHIPS];
uint64_t ioseq;
uint32_t next_task_id;
// Stats
uint64_t chip_nonces[MINION_CHIPS];
uint64_t chip_nononces[MINION_CHIPS];
uint64_t chip_good[MINION_CHIPS];
uint64_t chip_bad[MINION_CHIPS];
uint64_t chip_err[MINION_CHIPS];
uint64_t chip_dup[MINION_CHIPS];
uint64_t core_good[MINION_CHIPS][MINION_CORES+1];
uint64_t core_bad[MINION_CHIPS][MINION_CORES+1];
uint32_t chip_core_ena[MINION_CORE_REPS][MINION_CHIPS];
uint32_t chip_core_act[MINION_CORE_REPS][MINION_CHIPS];
struct minion_status chip_status[MINION_CHIPS];
uint64_t interrupts;
uint64_t result_interrupts;
uint64_t command_interrupts;
char last_interrupt[64];
pthread_mutex_t nonce_lock;
uint64_t new_nonces;
uint64_t ok_nonces;
uint64_t untested_nonces;
uint64_t tested_nonces;
uint64_t work_unrolled;
uint64_t work_rolled;
uint64_t spi_errors;
uint64_t fifo_spi_errors[MINION_CHIPS];
uint64_t res_spi_errors[MINION_CHIPS];
uint64_t use_res2[MINION_CHIPS];
uint64_t tasks_failed[MINION_CHIPS];
uint64_t tasks_recovered[MINION_CHIPS];
uint64_t nonces_failed[MINION_CHIPS];
uint64_t nonces_recovered[MINION_CHIPS];
struct timeval last_reset[MINION_CHIPS];
double do_reset[MINION_CHIPS];
bool flag_reset[MINION_CHIPS];
// Work items
K_LIST *wfree_list;
K_STORE *wwork_list;
K_STORE *wstale_list;
K_STORE *wque_list[MINION_CHIPS];
K_STORE *wchip_list[MINION_CHIPS];
uint64_t wwork_flushed;
uint64_t wque_flushed;
uint64_t wchip_staled;
// Task list
K_LIST *tfree_list;
K_STORE *task_list;
K_STORE *treply_list;
uint64_t next_tid;
// Nonce replies
K_LIST *rfree_list;
K_STORE *rnonce_list;
struct timeval last_did;
// Nonce history
K_LIST *hfree_list;
K_STORE *hchip_list[MINION_CHIPS];
int history_gen;
struct timeval chip_chk;
struct timeval chip_rpt;
double history_ghs[MINION_CHIPS];
// Point in history for MINION_RESET_s
int reset_time[MINION_CHIPS];
K_ITEM *reset_mark[MINION_CHIPS];
int reset_count[MINION_CHIPS];
// Point in history for MINION_RESET2_s
int reset2_time[MINION_CHIPS];
K_ITEM *reset2_mark[MINION_CHIPS];
int reset2_count[MINION_CHIPS];
// Performance history
K_LIST *pfree_list;
K_STORE *p_list[MINION_CHIPS];
// 0xff history
K_LIST *xfree_list;
K_STORE *xff_list;
time_t last_power_cycle;
uint64_t power_cycles;
time_t last_xff;
uint64_t xffs;
uint64_t last_displayed_xff;
// Gets reset to zero each time it is used in reporting
int res_err_count[MINION_CHIPS];
#if DO_IO_STATS
// Total
IOSTAT summary;
// Two for each command plus wasted extras i.e. direct/fast lookup
// No error uses 0x0 to 0xff, error uses 0x100 to 0x1ff
IOSTAT iostats[0x200];
#endif
// Stats on how long work is waiting to move from wwork_list to wque_list
uint64_t que_work;
double que_time;
double que_min;
double que_max;
uint64_t que_bands[TIME_BANDS+1];
// From wwork_list to txrx
uint64_t wt_work;
double wt_time;
double wt_min;
double wt_max;
uint64_t wt_bands[TIME_BANDS+1];
bool lednow[MINION_CHIPS];
bool setled[MINION_CHIPS];
// When changing the frequency don't modify 'anything'
bool changing[MINION_CHIPS];
int init_freq[MINION_CHIPS];
int want_freq[MINION_CHIPS];
uint32_t freqsent[MINION_CHIPS];
struct timeval lastfreq[MINION_CHIPS];
int freqms[MINION_CHIPS];
bool initialised;
};
#if MINION_ROCKCHIP == 1
static bool minion_toggle_gpio(struct cgpu_info *minioncgpu, int gpionum)
{
struct minion_info *minioninfo = (struct minion_info *)(minioncgpu->device_data);
char pindir[64], ena[64], pin[8], dir[64];
char gpiointvalue[64];
struct stat st;
int file, err, chip;
ssize_t ret;
snprintf(pindir, sizeof(pindir), MINION_GPIO_SYS MINION_GPIO_PIN, gpionum);
memset(&st, 0, sizeof(st));