generated from TinyTapeout/tt05-submission-template
-
Notifications
You must be signed in to change notification settings - Fork 0
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
- Loading branch information
Showing
3 changed files
with
833 additions
and
0 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,121 @@ | ||
# TT 3.5 shuttle user config file | ||
# DEFAULT is system-wide section | ||
# [PROJECT_NAME] is tt_um_whatever for that project | ||
# comment out lines by starting with # | ||
# empty values are ok, e.g. | ||
# project = | ||
# will load nothing by default | ||
# numbers can be int, float, scientific, bin or hex | ||
|
||
|
||
|
||
#### DEFAULT Section #### | ||
|
||
[DEFAULT] | ||
# project: project to load by default | ||
project = tt_um_top_mole99 | ||
|
||
# start in reset (bool) | ||
start_in_reset = no | ||
|
||
# mode can be any of | ||
# - SAFE: all RP2040 pins inputs | ||
# - ASIC_RP_CONTROL: TT inputs,nrst and clock driven, outputs monitored | ||
# - ASIC_MANUAL_INPUTS: basically same as safe, but intent is clear | ||
mode = ASIC_RP_CONTROL | ||
|
||
# log_level can be one of | ||
# - DEBUG | ||
# - INFO | ||
# - WARN | ||
# - ERROR | ||
log_level = INFO | ||
|
||
|
||
# default RP2040 system clock | ||
rp_clock_frequency = 125e6 | ||
|
||
#### PROJECT OVERRIDES #### | ||
|
||
|
||
[tt_um_test] | ||
clock_frequency = 10 | ||
start_in_reset = no | ||
input_byte = 1 | ||
|
||
[tt_um_factory_test] | ||
clock_frequency = 10 | ||
start_in_reset = no | ||
input_byte = 1 | ||
|
||
|
||
[tt_um_psychogenic_neptuneproportional] | ||
# set clock to 4kHz | ||
clock_frequency = 4000 | ||
# clock config 4k, disp single bits | ||
input_byte = 0b11001000 | ||
mode = ASIC_RP_CONTROL | ||
|
||
|
||
[wokwi_7seg_tiny_tapeout_display] | ||
rp_clock_frequency = 50_000_000 | ||
clock_frequency = 5 | ||
mode = ASIC_RP_CONTROL | ||
|
||
[tt_um_seven_segment_seconds] | ||
rp_clock_frequency = 120e6 | ||
clock_frequency = 10e6 | ||
input_byte = 0 | ||
mode = ASIC_RP_CONTROL | ||
|
||
|
||
|
||
|
||
[tt_um_loopback] | ||
# ui_in[0] == 1 means bidirs on output | ||
clock_frequency = 1000 | ||
input_byte = 1 | ||
|
||
# bidir_direction, 1 bit means we will | ||
# write to it (RP pin is output), | ||
# 0 means read from (RP is input) | ||
# set to all output | ||
bidir_direction = 0xff | ||
bidir_byte = 0b110010101 | ||
|
||
[tt_um_vga_clock] | ||
rp_clock_frequency = 126e6 | ||
clock_frequency = 31.5e6 | ||
mode = ASIC_RP_CONTROL | ||
|
||
|
||
[tt_um_urish_simon] | ||
clock_frequency = 50000 | ||
mode = ASIC_MANUAL_INPUTS | ||
|
||
|
||
[tt_um_algofoogle_solo_squash] | ||
mode = ASIC_RP_CONTROL | ||
|
||
# start inactive (all ins 0) | ||
input_byte = 0 | ||
|
||
# Ensure we are *reading* from all of the ASIC's bidir pins, | ||
# so bidirs all inputs: | ||
bidir_direction = 0 | ||
|
||
|
||
|
||
[tt_um_psychogenic_shaman] | ||
mode = ASIC_RP_CONTROL | ||
clock_frequency = 1e6 | ||
# shaman uses a mix of in and out on bidir | ||
bidir_direction = 0b11001100 | ||
bidir_byte = 0 | ||
|
||
|
||
[tt_um_top_mole99] | ||
rp_clock_frequency = 126e6 | ||
clock_frequency = 40e6 | ||
mode = ASIC_RP_CONTROL | ||
start_in_reset = no |
Oops, something went wrong.