diff --git a/dv/verilator/demo_system_verilator_lint.vlt b/dv/verilator/demo_system_verilator_lint.vlt index 186eb467..05c6418b 100644 --- a/dv/verilator/demo_system_verilator_lint.vlt +++ b/dv/verilator/demo_system_verilator_lint.vlt @@ -27,5 +27,7 @@ lint_off -rule UNUSED -file "*ibex_register_file_fpga*" lint_off -rule UNOPTFLAT -file "*/lowrisc_prim_fifo_0/rtl/prim_fifo_async_simple.sv" lint_off -rule WIDTH -file "*pulp_riscv_dbg/src/dm_mem.sv" -lint_off -rule UNDRIVEN -file "*ibex_register_file_fpga.sv" lint_off -rule IMPERFECTSCH -file "*prim_flop_2sync.sv" + +lint_off -rule WIDTH -file "*uartdpi.sv" +lint_off -rule UNUSED -file "*uartdpi.sv" diff --git a/dv/verilator/ibex_demo_system.cc b/dv/verilator/ibex_demo_system.cc index 50ca189f..3351c7b3 100644 --- a/dv/verilator/ibex_demo_system.cc +++ b/dv/verilator/ibex_demo_system.cc @@ -6,7 +6,7 @@ #include #include -#include "Vibex_demo_system__Syms.h" +#include "Vtop_verilator__Syms.h" #include "ibex_pcounts.h" #include "ibex_demo_system.h" #include "verilated_toplevel.h" @@ -36,7 +36,7 @@ int DemoSystem::Main(int argc, char **argv) { int DemoSystem::Setup(int argc, char **argv, bool &exit_app) { VerilatorSimCtrl &simctrl = VerilatorSimCtrl::GetInstance(); - simctrl.SetTop(&_top, &_top.clk_sys_i, &_top.rst_sys_ni, + simctrl.SetTop(&_top, &_top.clk_i, &_top.rst_ni, VerilatorSimCtrlFlags::ResetPolarityNegative); _memutil.RegisterMemoryArea("ram", 0x0, &_ram); @@ -66,7 +66,7 @@ bool DemoSystem::Finish() { // Set the scope to the root scope, the ibex_pcount_string function otherwise // doesn't know the scope itself. Could be moved to ibex_pcount_string, but // would require a way to set the scope name from here, similar to MemUtil. - svSetScope(svGetScopeFromName("TOP.ibex_demo_system")); + svSetScope(svGetScopeFromName("TOP.top_verilator.u_ibex_demo_system")); std::cout << "\nPerformance Counters" << std::endl << "====================" << std::endl; diff --git a/dv/verilator/ibex_demo_system.h b/dv/verilator/ibex_demo_system.h index 0b4ffce1..57b210f9 100644 --- a/dv/verilator/ibex_demo_system.h +++ b/dv/verilator/ibex_demo_system.h @@ -13,7 +13,7 @@ class DemoSystem { protected: - ibex_demo_system _top; + top_verilator _top; VerilatorMemUtil _memutil; MemArea _ram; diff --git a/dv/verilator/ibex_demo_system_main.cc b/dv/verilator/ibex_demo_system_main.cc index 2013a632..00244612 100644 --- a/dv/verilator/ibex_demo_system_main.cc +++ b/dv/verilator/ibex_demo_system_main.cc @@ -6,7 +6,7 @@ int main(int argc, char **argv) { DemoSystem demo_system( - "TOP.ibex_demo_system.u_ram.u_ram.gen_generic.u_impl_generic", + "TOP.top_verilator.u_ibex_demo_system.u_ram.u_ram.gen_generic.u_impl_generic", 1024 * 1024); return demo_system.Main(argc, argv); diff --git a/dv/verilator/top_verilator.sv b/dv/verilator/top_verilator.sv new file mode 100644 index 00000000..49f53c19 --- /dev/null +++ b/dv/verilator/top_verilator.sv @@ -0,0 +1,57 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +// This is the top level that connects the demo system to the virtual devices. +module top_verilator (input logic clk_i, rst_ni); + + localparam ClockFrequency = 50_000_000; + localparam BaudRate = 115_200; + + logic uart_sys_rx, uart_sys_tx; + + // Instantiating the Ibex Demo System. + ibex_demo_system #( + .GpiWidth ( 8 ), + .GpoWidth ( 16 ), + .PwmWidth ( 12 ), + .ClockFrequency ( ClockFrequency ), + .BaudRate ( BaudRate ), + .RegFile ( ibex_pkg::RegFileFF ) + ) u_ibex_demo_system ( + //Input + .clk_sys_i (clk_i), + .rst_sys_ni(rst_ni), + .uart_rx_i (uart_sys_rx), + + //Output + .uart_tx_o(uart_sys_tx), + + // tie off JTAG + .trst_ni(1'b1), + .tms_i (1'b0), + .tck_i (1'b0), + .td_i (1'b0), + .td_o ( ), + + // Remaining IO + .gp_i (0), + .gp_o ( ), + .pwm_o ( ), + .spi_rx_i (0), + .spi_tx_o ( ), + .spi_sck_o ( ) + ); + + // Virtual UART + uartdpi #( + .BAUD(BaudRate), + .FREQ(ClockFrequency) + ) u_uartdpi ( + .clk_i, + .rst_ni, + .active (1'b1 ), + .tx_o (uart_sys_rx), + .rx_i (uart_sys_tx) + ); +endmodule diff --git a/ibex_demo_system.core b/ibex_demo_system.core index 094ace24..2045ac41 100644 --- a/ibex_demo_system.core +++ b/ibex_demo_system.core @@ -49,7 +49,10 @@ filesets: - lowrisc:dv_verilator:memutil_verilator - lowrisc:dv_verilator:simutil_verilator - lowrisc:dv_verilator:ibex_pcounts + - lowrisc:dv_dpi_c:uartdpi:0.1 + - lowrisc:dv_dpi_sv:uartdpi:0.1 files: + - dv/verilator/top_verilator.sv: { file_type: systemVerilogSource } - dv/verilator/ibex_demo_system.cc: { file_type: cppSource } - dv/verilator/ibex_demo_system.h: { file_type: cppSource, is_include_file: true} - dv/verilator/ibex_demo_system_main.cc: { file_type: cppSource } @@ -163,7 +166,7 @@ targets: default_tool: verilator filesets_append: - files_verilator - toplevel: ibex_demo_system + toplevel: top_verilator tools: verilator: mode: cc @@ -175,7 +178,7 @@ targets: - '--trace-structs' - '--trace-params' - '--trace-max-array 1024' - - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=ibex_demo_system"' + - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=top_verilator"' - '-LDFLAGS "-pthread -lutil -lelf"' - "-Wall" - "-Wwarn-IMPERFECTSCH" diff --git a/rtl/system/ibex_demo_system.sv b/rtl/system/ibex_demo_system.sv index a697be29..8cdc8697 100644 --- a/rtl/system/ibex_demo_system.sv +++ b/rtl/system/ibex_demo_system.sv @@ -12,10 +12,13 @@ // - Debug module. // - SPI for driving LCD screen. module ibex_demo_system #( - parameter int GpiWidth = 8, - parameter int GpoWidth = 16, - parameter int PwmWidth = 12, - parameter SRAMInitFile = "" + parameter int GpiWidth = 8, + parameter int GpoWidth = 16, + parameter int PwmWidth = 12, + parameter int unsigned ClockFrequency = 50_000_000, + parameter int unsigned BaudRate = 115_200, + parameter ibex_pkg::regfile_e RegFile = ibex_pkg::RegFileFPGA, + parameter SRAMInitFile = "" ) ( input logic clk_sys_i, input logic rst_sys_ni, @@ -231,7 +234,7 @@ module ibex_demo_system #( assign rst_core_n = rst_sys_ni & ~ndmreset_req; ibex_top #( - .RegFile ( ibex_pkg::RegFileFPGA ), + .RegFile ( RegFile ), .MHPMCounterNum ( 10 ), .RV32M ( ibex_pkg::RV32MFast ), .RV32B ( ibex_pkg::RV32BNone ), @@ -356,7 +359,8 @@ module ibex_demo_system #( ); uart #( - .ClockFrequency ( 50_000_000 ) + .ClockFrequency ( ClockFrequency ), + .BaudRate ( BaudRate ) ) u_uart ( .clk_i (clk_sys_i), .rst_ni(rst_sys_ni), @@ -375,7 +379,7 @@ module ibex_demo_system #( ); spi_top #( - .ClockFrequency ( 50_000_000 ), + .ClockFrequency ( ClockFrequency ), .CPOL ( 0 ), .CPHA ( 1 ) ) u_spi (