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schoeberl committed May 13, 2024
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4 changes: 3 additions & 1 deletion README.md
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# Leros, a Tiny Processor Core

An FPGA optimized tiny processor core for embedded systems.
See more documentation on the github.io website for [Leros](https://leros-dev.github.io/).
See more documentation on the [website for Leros](https://leros-dev.github.io/).

This repository contains two versions of Leros: the initial 16-bit version in VHDL and
the redesign of 16/32/64-bit version in Chisel. The two versions are in the same spirit,
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## Questions

See also [TODO.md](TODO.md).

* Is load immediate sign extending? Is the high form sign extending?
* Yes, it is. Needs tests and documentation.
* What else is sign extending?
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30 changes: 5 additions & 25 deletions TODO.md
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- [ ] Fix cosimulation issues, Morten does sra and not shr
- [x] Change to arithmetic shift
- [x] Have the Leros simulator as a submodule
- [ ] Use the simulator in GitHub actions (does not compile)
- [ ] Get GitHub CI green
- [x] Use the simulator in GitHub actions (does not compile)
- [x] Get GitHub CI green
- [ ] Restructure with one state per instruction type (like in old CA books)
- [ ] Decide on where the docu is:
* README here
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- [ ] Memory: read in first state, write in second. Is this how we want to do it?
- [ ] Take a note on: semantic changed to have opd in words, halfword, or bytes, but address in bytes
- [ ] Looks like Morten's simulator/compiler sign extends ldindb/h, Check it
* and document it
- [ ] and document it
- [ ] Explore Tjark's test generation (with cosimulation)
- [ ] Use the C compiler
- [ ] Run C compiler tests
- [ ] Are half word load stores used in the compiler?
- [ ] Any instruction not used by the compiler
- [ ] Are half word load and stores used in the compiler?
- [ ] Any instruction not used by the compiler?
- [ ] Accu byte enables
- [ ] load/store byte indirect
- [ ] Does subi sign extend? Do we need a subi? We could use addi with neg. values
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* Get text from paper into handbook, including the instruction figure

## Missing Instructions (tests and/or implementation)

* add (test)
* sub (test)
* and (test)
* or (test)
* xor (test)
* xori (test)
* loadi (test for sign extension, also high versions)
* out
* in
* jal
* ldind (offset broken now, as it counts for ldindb, test missing)
* ldindh
* stind (offset broken now, as it counts for ldindb, test missing)
* stindb
* stindh
* br (test)


## List of Instructions to be Tested

```aidl
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