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Switch to arithmetic right shift
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schoeberl committed May 13, 2024
1 parent 7380fb6 commit b7debc2
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1 change: 1 addition & 0 deletions TODO.md
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- [ ] Get an overview of what is implemented (and add missing to TODO)
- [ ] Fix cosimulation issues, Morten does sra and not shr
- [ ] Change to arithmetic shift
- [x] Have the Leros simulator as a submodule
- [x] Use the simulator in GitHub actions
- [ ] Get GitHub CI green
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16 changes: 8 additions & 8 deletions asm/test/imm.s
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Expand Up @@ -11,13 +11,13 @@
loadi 0xff
loadh2i 0x00
and r2
shr
shr
shr
shr
shr
shr
shr
shr
sra
sra
sra
sra
sra
sra
sra
sra
subi 0x56
scall 0
16 changes: 8 additions & 8 deletions asm/test/lhi.s
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@@ -1,13 +1,13 @@
// test loadhi
loadi 0x12
loadhi 0x23
shr
shr
shr
shr
shr
shr
shr
shr
sra
sra
sra
sra
sra
sra
sra
sra
subi 0x23
scall 0
96 changes: 48 additions & 48 deletions asm/test/lhi3.s
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Expand Up @@ -10,66 +10,66 @@
store r2

load r2
shr
shr
shr
shr
shr
shr
shr
shr
sra
sra
sra
sra
sra
sra
sra
sra
subi 0x23
andi 0xff
add r1
store r1

load r2
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
sra
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sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
subi 0x45
andi 0xff
add r1
store r1

load r2
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
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shr
sra
sra
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sra
sra
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sra
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sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
subi 0x78
add r1
store r1
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148 changes: 74 additions & 74 deletions asm/test/loadix.s
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Expand Up @@ -6,10 +6,10 @@

// sign extension?
loadi -1
shr
shr
shr
shr
sra
sra
sra
sra
andi 0x0f
subi 0x0f
add r2
Expand All @@ -23,107 +23,107 @@

// high immediate sign extension
loadhi 0xff
shr
shr
shr
shr
shr
shr
shr
shr
shr
sra
sra
sra
sra
sra
sra
sra
sra
sra
andi 0x80
shr
sra
subi 0x40
add r2
store r2

// clear upper bytes after sign extension
loadi -1
loadhi 0x00
shr
sra
subi 0x7f
add r2
store r2

// 3rd byte
loadh2i 0x12
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
sra
sra
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sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
subi 0x12
add r2
store r2

// 3rd byte sign extension
loadh2i 0xff
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
sra
sra
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sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
andi 0x80
shr
sra
subi 0x40
add r2
store r2

// 4th byte
loadh3i 0x34
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
shr
sra
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sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
sra
subi 0x34
add r2
store r2

// final result
loadi 1
load r2
scall 0
scall 0
16 changes: 8 additions & 8 deletions asm/test/mem.s
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Expand Up @@ -14,14 +14,14 @@
stind 0
loadi 0x01
ldind 0
shr
shr
shr
shr
shr
shr
shr
shr
sra
sra
sra
sra
sra
sra
sra
sra
subi 0x34
andi 0xff
add r1
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