Use Leros.sv

leros-dev · Sep 5, 2024 · 1eb31a7 · 1eb31a7
1 parent 209e291
commit 1eb31a7
Showing 1 changed file with 2 additions and 1 deletion.
diff --git a/Makefile b/Makefile
@@ -54,11 +54,12 @@ list-swsim:
 # Synthesize and copy targets
 
 # does not work from Makefile, C & P into shell
+# Path for chipdesign1 (not helena)
 synpath:
 	source /home/shared/Xilinx/Vivado/2017.4/settings64.sh
 
 synth:
-	./vivado_synth -t Leros -p xc7a100tcsg324-1 -x nexysA7.xdc -o build generated/Leros.v
+	./vivado_synth -t Leros -p xc7a100tcsg324-1 -x nexysA7.xdc -o build generated/Leros.sv
 
 cp-bit:
 	-mkdir build