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ApolloLakeFspBinPkg[MR6] configures PCIe Root Port's DCTL[MPS] #56

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n-huber opened this issue Oct 9, 2020 · 0 comments
Open

ApolloLakeFspBinPkg[MR6] configures PCIe Root Port's DCTL[MPS] #56

n-huber opened this issue Oct 9, 2020 · 0 comments

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@n-huber
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n-huber commented Oct 9, 2020

FSP configures the effective Max Payload Size for PCIe Root Ports (and probably other integrated PCIe devices). This seems wrong, because only the OS drivers for PCIe devices know the target of transactions and can decide the maximum payload size on the route.
Please fix that. Or add an option to FSP to disable its OS features. It's obvious that having unnecessary features in FSP only increases the amount of things that can go wrong (cf. #55). Such errors make the use of FSP much more expensive than a custom implementation.

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