Position not aligned to addrress boundary

[RomaricKc1]

I have that one program I try to assemble but get an error.

#bits 16

#subruledef reg {
    r0  =>  0x0
    r1  =>  0x1
}

#ruledef {
    add  {rd:reg}, {rs:reg} => 0x1b`5  @ 0`3 @ rd`4 @ rs`4
    jump  {address} => 0x1c`5  @ address`11
    ret => 0x1d`5
    nop => 0x1e`5
}

foo:
	.org:
		add r0, r1			; addr 0x00
		add r0, r1			; 0x01
		jump .routine		        ; 0x02: BL stuff here. Will jump to routine at 0x04
		jump .end			; 0x03
	.routine:
		add r0, r1			; 0x04
		ret				; 0x05 exit routine go back to 0x03 thanks to LR
	.end:
		nop				; 0x06
		nop				; 0x07
		jump .org			; 0x08

I get this as output:

error: position is not aligned to an address boundary (11 bits short)
 --> asm:24:2:
 22 |     add r0, r1      ; 0x04 
 23 |     ret        ; 0x05 exit routine go back to 0x03 thanks to LR 
 24 |   .end: 
    |   ^^^^^  
 25 |     nop        ; 0x06 
 26 |     nop        ; 0x07 

Am I missing something or is there a real issue?
I was about to put it in issues but thought I might have an issue with my program. Thank you

[hlorenzi]

ret => 0x1d`5
nop => 0x1e`5

Both your ret and your nop instructions are being encoded as 5-bit opcodes, which is breaking the 16-bit address alignment! Is this on purpose?

[RomaricKc1]

Oh, I did not think about the whole instruction. The idea is that the other bits do not affect the instruction. I better off setting them to 0 like this.

#ruledef {
    ret => 0x1d`5 @ 0`11
    nop => 0x1e`5 @ 0`11
}

They should also be 16-bit wide.

This solved the problem. Thank you!