From 3d61bc56807283680341f06c5726110e7b383164 Mon Sep 17 00:00:00 2001 From: Henrique Lorenzi Date: Thu, 24 Jun 2021 15:49:18 -0300 Subject: [PATCH] update nes example --- examples/nes/cpu6502.asm | 154 ++++++++++++++++++++++++--------------- examples/nes/main.asm | 31 ++++++-- src/test/examples.rs | 6 +- 3 files changed, 122 insertions(+), 69 deletions(-) diff --git a/examples/nes/cpu6502.asm b/examples/nes/cpu6502.asm index 2fb0c8ce..095968a6 100644 --- a/examples/nes/cpu6502.asm +++ b/examples/nes/cpu6502.asm @@ -15,33 +15,39 @@ adc #{imm: i8 } => 0x69 @ imm adc <{zaddr: u8 } => 0x65 @ zaddr adc <{zaddr: u8 }, x => 0x75 @ zaddr - adc {addr: u16} => 0x6d @ addr[7:0] @ addr[15:8] - adc {addr: u16}, x => 0x7d @ addr[7:0] @ addr[15:8] - adc {addr: u16}, y => 0x79 @ addr[7:0] @ addr[15:8] + adc {zaddr: u8 } => 0x65 @ zaddr + adc {zaddr: u8 }, x => 0x75 @ zaddr + adc {addr: u16} => 0x6d @ le(addr) + adc {addr: u16}, x => 0x7d @ le(addr) + adc {addr: u16}, y => 0x79 @ le(addr) adc ({zaddr: u8 }, x) => 0x61 @ zaddr adc ({zaddr: u8 }), y => 0x71 @ zaddr - and #{imm: i8 } => 0x29 @ imm + and #{imm: i8 } => 0x29 @ imm and <{zaddr: u8 } => 0x25 @ zaddr and <{zaddr: u8 }, x => 0x35 @ zaddr - and {addr: u16} => 0x2d @ addr[7:0] @ addr[15:8] - and {addr: u16}, x => 0x3d @ addr[7:0] @ addr[15:8] - and {addr: u16}, y => 0x39 @ addr[7:0] @ addr[15:8] + and {zaddr: u8 } => 0x25 @ zaddr + and {zaddr: u8 }, x => 0x35 @ zaddr + and {addr: u16} => 0x2d @ le(addr) + and {addr: u16}, x => 0x3d @ le(addr) + and {addr: u16}, y => 0x39 @ le(addr) and ({zaddr: u8 }, x) => 0x21 @ zaddr and ({zaddr: u8 }), y => 0x31 @ zaddr asl a => 0x0a asl <{zaddr: u8 } => 0x07 @ zaddr asl <{zaddr: u8 }, x => 0x16 @ zaddr - asl {addr: u16} => 0x0e @ addr[7:0] @ addr[15:8] - asl {addr: u16}, x => 0x1e @ addr[7:0] @ addr[15:8] + asl {zaddr: u8 } => 0x07 @ zaddr + asl {zaddr: u8 }, x => 0x16 @ zaddr + asl {addr: u16} => 0x0e @ le(addr) + asl {addr: u16}, x => 0x1e @ le(addr) bcc {addr: cpu6502_reladdr} => 0x90 @ addr bcs {addr: cpu6502_reladdr} => 0x80 @ addr beq {addr: cpu6502_reladdr} => 0xf0 @ addr bit <{zaddr: u8 } => 0x24 @ zaddr - bit {addr: u16} => 0x2C @ addr[7:0] @ addr[15:8] + bit {addr: u16} => 0x2C @ le(addr) bmi {addr: cpu6502_reladdr} => 0x30 @ addr bne {addr: cpu6502_reladdr} => 0xd0 @ addr @@ -57,88 +63,108 @@ cli => 0x58 clv => 0xb8 - cmp #{imm: i8 } => 0xc9 @ imm + cmp #{imm: i8 } => 0xc9 @ imm cmp <{zaddr: u8 } => 0xc5 @ zaddr cmp <{zaddr: u8 }, x => 0xd5 @ zaddr - cmp {addr: u16} => 0xcd @ addr[7:0] @ addr[15:8] - cmp {addr: u16}, x => 0xdd @ addr[7:0] @ addr[15:8] - cmp {addr: u16}, y => 0xd9 @ addr[7:0] @ addr[15:8] + cmp {zaddr: u8 } => 0xc5 @ zaddr + cmp {zaddr: u8 }, x => 0xd5 @ zaddr + cmp {addr: u16} => 0xcd @ le(addr) + cmp {addr: u16}, x => 0xdd @ le(addr) + cmp {addr: u16}, y => 0xd9 @ le(addr) cmp ({zaddr: u8 }, x) => 0xc1 @ zaddr cmp ({zaddr: u8 }), y => 0xd1 @ zaddr - cpx #{imm: i8 } => 0xe0 @ imm + cpx #{imm: i8 } => 0xe0 @ imm cpx <{zaddr: u8 } => 0xe4 @ zaddr - cpx {addr: u16} => 0xec @ addr[7:0] @ addr[15:8] + cpx {zaddr: u8 } => 0xe4 @ zaddr + cpx {addr: u16} => 0xec @ le(addr) - cpy #{imm: i8 } => 0xc0 @ imm + cpy #{imm: i8 } => 0xc0 @ imm cpy <{zaddr: u8 } => 0xc4 @ zaddr - cpy {addr: u16} => 0xcc @ addr[7:0] @ addr[15:8] + cpy {zaddr: u8 } => 0xc4 @ zaddr + cpy {addr: u16} => 0xcc @ le(addr) dec <{zaddr: u8 } => 0xc6 @ zaddr dec <{zaddr: u8 }, x => 0xd6 @ zaddr - dec {addr: u16} => 0xce @ addr[7:0] @ addr[15:8] - dec {addr: u16}, x => 0xde @ addr[7:0] @ addr[15:8] + dec {zaddr: u8 } => 0xc6 @ zaddr + dec {zaddr: u8 }, x => 0xd6 @ zaddr + dec {addr: u16} => 0xce @ le(addr) + dec {addr: u16}, x => 0xde @ le(addr) dex => 0xca dey => 0x88 - eor #{imm: i8 } => 0x49 @ imm + eor #{imm: i8 } => 0x49 @ imm eor <{zaddr: u8 } => 0x45 @ zaddr eor <{zaddr: u8 }, x => 0x55 @ zaddr - eor {addr: u16} => 0x4d @ addr[7:0] @ addr[15:8] - eor {addr: u16}, x => 0x5d @ addr[7:0] @ addr[15:8] - eor {addr: u16}, y => 0x59 @ addr[7:0] @ addr[15:8] + eor {zaddr: u8 } => 0x45 @ zaddr + eor {zaddr: u8 }, x => 0x55 @ zaddr + eor {addr: u16} => 0x4d @ le(addr) + eor {addr: u16}, x => 0x5d @ le(addr) + eor {addr: u16}, y => 0x59 @ le(addr) eor ({zaddr: u8 }, x) => 0x41 @ zaddr eor ({zaddr: u8 }), y => 0x51 @ zaddr inc <{zaddr: u8 } => 0xe6 @ zaddr inc <{zaddr: u8 }, x => 0xf6 @ zaddr - inc {addr: u16} => 0xee @ addr[7:0] @ addr[15:8] - inc {addr: u16}, x => 0xfe @ addr[7:0] @ addr[15:8] + inc {zaddr: u8 } => 0xe6 @ zaddr + inc {zaddr: u8 }, x => 0xf6 @ zaddr + inc {addr: u16} => 0xee @ le(addr) + inc {addr: u16}, x => 0xfe @ le(addr) inx => 0xe8 iny => 0xc8 - jmp {addr: u16} => 0x4c @ addr[7:0] @ addr[15:8] - jmp ({addr: u16}) => 0x6c @ addr[7:0] @ addr[15:8] + jmp {addr: u16} => 0x4c @ le(addr) + jmp ({addr: u16}) => 0x6c @ le(addr) - jsr {addr: u16} => 0x20 @ addr[7:0] @ addr[15:8] + jsr {addr: u16} => 0x20 @ le(addr) - lda #{imm: i8 } => 0xa9 @ imm + lda #{imm: i8 } => 0xa9 @ imm lda <{zaddr: u8 } => 0xa5 @ zaddr lda <{zaddr: u8 }, x => 0xb5 @ zaddr - lda {addr: u16} => 0xad @ addr[7:0] @ addr[15:8] - lda {addr: u16}, x => 0xbd @ addr[7:0] @ addr[15:8] - lda {addr: u16}, y => 0xb9 @ addr[7:0] @ addr[15:8] + lda {zaddr: u8 } => 0xa5 @ zaddr + lda {zaddr: u8 }, x => 0xb5 @ zaddr + lda {addr: u16} => 0xad @ le(addr) + lda {addr: u16}, x => 0xbd @ le(addr) + lda {addr: u16}, y => 0xb9 @ le(addr) lda ({zaddr: u8 }, x) => 0xa1 @ zaddr lda ({zaddr: u8 }), y => 0xb1 @ zaddr - ldx #{imm: i8 } => 0xa2 @ imm + ldx #{imm: i8 } => 0xa2 @ imm ldx <{zaddr: u8 } => 0xa6 @ zaddr ldx <{zaddr: u8 }, y => 0xb6 @ zaddr - ldx {addr: u16} => 0xae @ addr[7:0] @ addr[15:8] - ldx {addr: u16}, y => 0xbe @ addr[7:0] @ addr[15:8] + ldx {zaddr: u8 } => 0xa6 @ zaddr + ldx {zaddr: u8 }, y => 0xb6 @ zaddr + ldx {addr: u16} => 0xae @ le(addr) + ldx {addr: u16}, y => 0xbe @ le(addr) - ldy #{imm: i8 } => 0xa0 @ imm + ldy #{imm: i8 } => 0xa0 @ imm ldy <{zaddr: u8 } => 0xa4 @ zaddr ldy <{zaddr: u8 }, x => 0xb4 @ zaddr - ldy {addr: u16} => 0xac @ addr[7:0] @ addr[15:8] - ldy {addr: u16}, x => 0xbc @ addr[7:0] @ addr[15:8] + ldy {zaddr: u8 } => 0xa4 @ zaddr + ldy {zaddr: u8 }, x => 0xb4 @ zaddr + ldy {addr: u16} => 0xac @ le(addr) + ldy {addr: u16}, x => 0xbc @ le(addr) lsr a => 0x4a lsr <{zaddr: u8 } => 0x46 @ zaddr lsr <{zaddr: u8 }, x => 0x56 @ zaddr - lsr {addr: u16} => 0x4e @ addr[7:0] @ addr[15:8] - lsr {addr: u16}, x => 0x5e @ addr[7:0] @ addr[15:8] + lsr {zaddr: u8 } => 0x46 @ zaddr + lsr {zaddr: u8 }, x => 0x56 @ zaddr + lsr {addr: u16} => 0x4e @ le(addr) + lsr {addr: u16}, x => 0x5e @ le(addr) nop => 0xea - ora #{imm: i8 } => 0x09 @ imm + ora #{imm: i8 } => 0x09 @ imm ora <{zaddr: u8 } => 0x05 @ zaddr ora <{zaddr: u8 }, x => 0x15 @ zaddr - ora {addr: u16} => 0x0d @ addr[7:0] @ addr[15:8] - ora {addr: u16}, x => 0x1d @ addr[7:0] @ addr[15:8] - ora {addr: u16}, y => 0x19 @ addr[7:0] @ addr[15:8] + ora {zaddr: u8 } => 0x05 @ zaddr + ora {zaddr: u8 }, x => 0x15 @ zaddr + ora {addr: u16} => 0x0d @ le(addr) + ora {addr: u16}, x => 0x1d @ le(addr) + ora {addr: u16}, y => 0x19 @ le(addr) ora ({zaddr: u8 }, x) => 0x01 @ zaddr ora ({zaddr: u8 }), y => 0x11 @ zaddr @@ -150,24 +176,30 @@ rol a => 0x2a rol <{zaddr: u8 } => 0x26 @ zaddr rol <{zaddr: u8 }, x => 0x36 @ zaddr - rol {addr: u16} => 0x2e @ addr[7:0] @ addr[15:8] - rol {addr: u16}, x => 0x3e @ addr[7:0] @ addr[15:8] + rol {zaddr: u8 } => 0x26 @ zaddr + rol {zaddr: u8 }, x => 0x36 @ zaddr + rol {addr: u16} => 0x2e @ le(addr) + rol {addr: u16}, x => 0x3e @ le(addr) ror a => 0x6a ror <{zaddr: u8 } => 0x66 @ zaddr ror <{zaddr: u8 }, x => 0x76 @ zaddr - ror {addr: u16} => 0x6e @ addr[7:0] @ addr[15:8] - ror {addr: u16}, x => 0x7e @ addr[7:0] @ addr[15:8] + ror {zaddr: u8 } => 0x66 @ zaddr + ror {zaddr: u8 }, x => 0x76 @ zaddr + ror {addr: u16} => 0x6e @ le(addr) + ror {addr: u16}, x => 0x7e @ le(addr) rti => 0x40 rts => 0x60 - sbc #{imm: i8 } => 0xe9 @ imm + sbc #{imm: i8 } => 0xe9 @ imm sbc <{zaddr: u8 } => 0xe5 @ zaddr sbc <{zaddr: u8 }, x => 0xf5 @ zaddr - sbc {addr: u16} => 0xed @ addr[7:0] @ addr[15:8] - sbc {addr: u16}, x => 0xfd @ addr[7:0] @ addr[15:8] - sbc {addr: u16}, y => 0xf9 @ addr[7:0] @ addr[15:8] + sbc {zaddr: u8 } => 0xe5 @ zaddr + sbc {zaddr: u8 }, x => 0xf5 @ zaddr + sbc {addr: u16} => 0xed @ le(addr) + sbc {addr: u16}, x => 0xfd @ le(addr) + sbc {addr: u16}, y => 0xf9 @ le(addr) sbc ({zaddr: u8 }, x) => 0xe1 @ zaddr sbc ({zaddr: u8 }), y => 0xf1 @ zaddr @@ -177,19 +209,25 @@ sta <{zaddr: u8 } => 0x85 @ zaddr sta <{zaddr: u8 }, x => 0x95 @ zaddr - sta {addr: u16} => 0x8d @ addr[7:0] @ addr[15:8] - sta {addr: u16}, x => 0x9d @ addr[7:0] @ addr[15:8] - sta {addr: u16}, y => 0x99 @ addr[7:0] @ addr[15:8] + sta {zaddr: u8 } => 0x85 @ zaddr + sta {zaddr: u8 }, x => 0x95 @ zaddr + sta {addr: u16} => 0x8d @ le(addr) + sta {addr: u16}, x => 0x9d @ le(addr) + sta {addr: u16}, y => 0x99 @ le(addr) sta ({zaddr: u8 }, x) => 0x81 @ zaddr sta ({zaddr: u8 }), y => 0x91 @ zaddr stx <{zaddr: u8 } => 0x86 @ zaddr stx <{zaddr: u8 }, y => 0x96 @ zaddr - stx {addr: u16} => 0x8e @ addr[7:0] @ addr[15:8] + stx {zaddr: u8 } => 0x86 @ zaddr + stx {zaddr: u8 }, y => 0x96 @ zaddr + stx {addr: u16} => 0x8e @ le(addr) sty <{zaddr: u8 } => 0x84 @ zaddr sty <{zaddr: u8 }, x => 0x94 @ zaddr - sty {addr: u16} => 0x8c @ addr[7:0] @ addr[15:8] + sty {zaddr: u8 } => 0x84 @ zaddr + sty {zaddr: u8 }, x => 0x94 @ zaddr + sty {addr: u16} => 0x8c @ le(addr) tax => 0xaa tay => 0xa8 diff --git a/examples/nes/main.asm b/examples/nes/main.asm index a982982d..d935030c 100644 --- a/examples/nes/main.asm +++ b/examples/nes/main.asm @@ -57,6 +57,10 @@ reset: .vblankwait2: bit PPU_STATUS bpl .vblankwait2 + + ; load first palette color + lda 0x0d + jsr loadPalette ; enable rendering lda #PPU_MASK_SHOWBKG | PPU_MASK_LEFTBKG @@ -83,16 +87,9 @@ nmi: sta varTimer ; update background color - lda PPU_STATUS - - lda #VRAM_PALETTE[15:8] - sta PPU_ADDR - lda #VRAM_PALETTE[7:0] - sta PPU_ADDR - ldx varPaletteIndex lda palette, x - sta PPU_DATA + jsr loadPalette ; increment palette index inc varPaletteIndex @@ -107,7 +104,25 @@ nmi: .end: irq: rti + + +loadPalette: + ; store color from A in all palette slots + ldx PPU_STATUS + + ldx #VRAM_PALETTE[15:8] + stx PPU_ADDR + ldx #VRAM_PALETTE[7:0] + stx PPU_ADDR + ldy #0x20 + .palleteLoop: + sta PPU_DATA + dey + bne .palleteLoop + + rts + palette: #d8 0x0d, 0x01, 0x12, 0x21, 0x31, 0x21, 0x12, 0x01, 0x0d ; blues diff --git a/src/test/examples.rs b/src/test/examples.rs index 8b2001a8..02314498 100644 --- a/src/test/examples.rs +++ b/src/test/examples.rs @@ -28,9 +28,9 @@ fn test_nes_example() test_example( "examples/nes/main.asm", &[ - 194, 190, 155, 144, 20, 50, 124, 170, 98, 249, - 99, 13, 159, 227, 169, 45, 203, 83, 54, 116, 56, - 113, 142, 114, 183, 67, 237, 97, 156, 21, 234, 191 + 226, 68, 213, 226, 71, 200, 16, 113, 21, 132, + 193, 34, 10, 134, 112, 238, 69, 165, 45, 199, 40, + 151, 195, 76, 157, 120, 172, 169, 37, 180, 123, 104 ]); }