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Yes, you are right. When RAM size > 2GB, first 2GB are not used. And subtracting 0x80000000 on AXI address buses is a good way to fix it. Actually, my latest version of Rocket.vhdl generator already does that, then adds RAM address (if it is not 0). It is not committed yet. It also has some other improvements. To avoid a merge conflicts, could you hold the generator changes until I commit?
Another possibility is to use SPI flash memory on the board to store both bitstream and OpenSBI+Uboot. This would require adding SPI flash controller in the design to read the flash, and changes to the BootROM. I think this approach is somewhat better, because it does not need rocket-chip changes, but I'm not sure.
Yes, QDMA Queues could be useful, but I would rather use Ethernet: TFTP to load kernel, NFS for root fs. QDMA adds a lot of complexity and a lot of bugs. It would be nice to be able to run everything without it. I'd prefer a boot sequence like this: FPGA boots from the flash, RISC-V BootROM loads OpenSBI+Uboot from the flash, Uboot loads Linux kernel over TFTP, Linux mounts root fs over NFS. |
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I agree, it would be nice. It also would be nice to be able to boot Linux without PCIe host, or with non-Linux PCIe host, or without XDMA drivers installed, or on a board without PCIe header. Ideally, both methods needs to be supported.
BTW, your u280/Makefile.inc contains line |
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I based the AU280 project from the AU250 support and didn't touch that line (because there was nothing to do at the moment) However, from here I see that: the address 0x0700_0000 is way above the protected area, and should begin from: 0x0100_2000 for all the alveo cards. Am I wrong? If there is as much space as I think, maybe it's not crazy to use the SPI as a permanent storage, with a simple linux fs and kernel. If I looked at it correctly, we have from 0x0100_2000 to 0x0800_0000 [edited, if I'm not wrong we have 128MB or 1024Mb] I'll start working on it on Monday, another thing that I made is to have two network interfaces, one for each QSFP. I didn't test it yet, but, software-wise, the driver you made should work with two interfaces at the same time, right? I'll inform here about any progress. |
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Hello,
I'm making the support for Alveo U280:
https://github.com/rucadi/vivado-risc-v (mostly the board/u280 folder)
but I made some changes that i wanted to discuss, to see if they are pertinent or not.
First, for some reason, I got the impression that the memory range [0x0000_0000-0x8000_0000] was not used.
This is because the mapping starts at 0x0000_0000, the lower addresses are used for internal devices or IO memory, so it was not able to be accessed. am I right?
I got away with modifying the Rocket.vhdl generation to add the following signals:
doing this assignments:
and mapping accordingly:
Also, one thing that I saw is that the Bring-up using JTAG is not ideal, since it's rather slow.
First, I modified rocket-chip (patch on my repo) in order to be able to configure a Maskrom, which contains OpenSBI+Uboot embedded in it. So when the bitstream is loaded, it automatically loads it. (Currently there is a jump hardcoded on the bootrom, I expect to set there conditional compilation)
Since we now have an U-boot console, we can use QDMA Queues in order to copy our linux images or load it via ethernet or any other method, without requiring JTAG at all and easing the use of the system and making it way faster.
While is true that it consumes some FPGA resources, for most cases it's ok in larger FPGA and since it's configurable I expect it to not be a problem.
Currently I'm investigating a problem with the QDMA driver (that is failing at init for something to do with MSI-X interrupts).
What do you think about these changes?
I'm wrong about the unused memory?
Regards,
Ruben.
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