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I use the LiteDRAMDMAWriter module of Litedram.dma . I have a problem, I would like to transmit data acquired in hard and write them in my ram without going through the soft side. For that, I wanted to try the LiteDramDmaWriter module with basic tests like writing (with sink.data) to a precise address (with sink.address) but it does not work. I checked that my sdram is well initialized.
My question is: is it possible to write just one byte to a specific address using the LiteDRAMDMAWriter module only in hardcore in python without going through softcore (except for the initialization of the sdram)?
Here is an example of a writing request I made in an fsm :
Here is my module initialization:
I set the valid to 1
The text was updated successfully, but these errors were encountered:
Hello,
I use the LiteDRAMDMAWriter module of Litedram.dma . I have a problem, I would like to transmit data acquired in hard and write them in my ram without going through the soft side. For that, I wanted to try the LiteDramDmaWriter module with basic tests like writing (with sink.data) to a precise address (with sink.address) but it does not work. I checked that my sdram is well initialized.
My question is: is it possible to write just one byte to a specific address using the LiteDRAMDMAWriter module only in hardcore in python without going through softcore (except for the initialization of the sdram)?
Here is an example of a writing request I made in an fsm :
Here is my module initialization:
I set the valid to 1
The text was updated successfully, but these errors were encountered: