From e18efff5780adebe88b5d487a02fd5ade05036ef Mon Sep 17 00:00:00 2001 From: marwaneltoukhy Date: Sun, 15 Oct 2023 10:43:15 +0300 Subject: [PATCH] updated gf makefile --- Makefile | 177 ++++++++++++++++++++++++++++++++++--------------------- 1 file changed, 111 insertions(+), 66 deletions(-) diff --git a/Makefile b/Makefile index 06e425515..27d2c63d9 100644 --- a/Makefile +++ b/Makefile @@ -24,17 +24,28 @@ SIM?=RTL CARAVEL_LITE?=1 # PDK switch varient -export PDK?=gf180mcuC +export PDK?=gf180mcuD #export PDK?=gf180mcuC export PDKPATH?=$(PDK_ROOT)/$(PDK) +PYTHON_BIN ?= python3 +ROOTLESS ?= 0 +USER_ARGS = -u $$(id -u $$USER):$$(id -g $$USER) +ifeq ($(ROOTLESS), 1) + USER_ARGS = +endif +export OPENLANE_ROOT?=$(PWD)/dependencies/openlane_src +export PDK_ROOT?=$(PWD)/dependencies/pdks +export DISABLE_LVS?=0 + +export ROOTLESS ifeq ($(PDK),sky130A) SKYWATER_COMMIT=f70d8ca46961ff92719d8870a18a076370b85f6c - export OPEN_PDKS_COMMIT?=0059588eebfc704681dc2368bd1d33d96281d10f - export OPENLANE_TAG?=2022.11.19 - MPW_TAG ?= mpw-8a + export OPEN_PDKS_COMMIT?=78b7bc32ddb4b6f14f76883c2e2dc5b5de9d1cbc + export OPENLANE_TAG?=2023.07.19 + MPW_TAG ?= mpw-9e ifeq ($(CARAVEL_LITE),1) CARAVEL_NAME := caravel-lite @@ -50,9 +61,9 @@ endif ifeq ($(PDK),sky130B) SKYWATER_COMMIT=f70d8ca46961ff92719d8870a18a076370b85f6c - export OPEN_PDKS_COMMIT?=0059588eebfc704681dc2368bd1d33d96281d10f - export OPENLANE_TAG?=2022.11.19 - MPW_TAG ?= mpw-8a + export OPEN_PDKS_COMMIT?=78b7bc32ddb4b6f14f76883c2e2dc5b5de9d1cbc + export OPENLANE_TAG?=2023.07.19 + MPW_TAG ?= mpw-9e ifeq ($(CARAVEL_LITE),1) CARAVEL_NAME := caravel-lite @@ -66,23 +77,22 @@ endif endif -ifeq ($(PDK),gf180mcuC) +ifeq ($(PDK),gf180mcuD) MPW_TAG ?= gfmpw-0d CARAVEL_NAME := caravel CARAVEL_REPO := https://github.com/efabless/caravel-gf180mcu CARAVEL_TAG := $(MPW_TAG) #OPENLANE_TAG=ddfeab57e3e8769ea3d40dda12be0460e09bb6d9 - #export OPEN_PDKS_COMMIT?=0059588eebfc704681dc2368bd1d33d96281d10f - export OPEN_PDKS_COMMIT?=35c7265f51749ad8d9fdbb575af22c7c8fab974e - export OPENLANE_TAG?=2022.11.29 + export OPEN_PDKS_COMMIT?=dd7771c384ed36b91a25e9f8b314355fc26561be + export OPENLANE_TAG?=2023.07.19 endif # Include Caravel Makefile Targets .PHONY: % : check-caravel %: - export CARAVEL_ROOT=$(CARAVEL_ROOT) && $(MAKE) -f $(CARAVEL_ROOT)/Makefile $@ + export CARAVEL_ROOT=$(CARAVEL_ROOT) && export MPW_TAG=$(MPW_TAG) && $(MAKE) -f $(CARAVEL_ROOT)/Makefile $@ .PHONY: install install: @@ -98,8 +108,13 @@ install: simenv: docker pull efabless/dv:latest +# Install cocotb docker +.PHONY: simenv-cocotb +simenv-cocotb: + docker pull efabless/dv:cocotb + .PHONY: setup -setup: install check-env install_mcw openlane pdk-with-volare setup-timing-scripts +setup: check_dependencies install check-env install_mcw openlane pdk-with-volare setup-timing-scripts setup-cocotb precheck # Openlane blocks=$(shell cd openlane && find * -maxdepth 0 -type d) @@ -108,16 +123,22 @@ $(blocks): % : $(MAKE) -C openlane $* dv_patterns=$(shell cd verilog/dv && find * -maxdepth 0 -type d) +cocotb-dv_patterns=$(shell cd verilog/dv/cocotb && find . -name "*.c" | sed -e 's|^.*/||' -e 's/.c//') dv-targets-rtl=$(dv_patterns:%=verify-%-rtl) +cocotb-dv-targets-rtl=$(cocotb-dv_patterns:%=cocotb-verify-%-rtl) dv-targets-gl=$(dv_patterns:%=verify-%-gl) +cocotb-dv-targets-gl=$(cocotb-dv_patterns:%=cocotb-verify-%-gl) dv-targets-gl-sdf=$(dv_patterns:%=verify-%-gl-sdf) TARGET_PATH=$(shell pwd) verify_command="source ~/.bashrc && cd ${TARGET_PATH}/verilog/dv/$* && export SIM=${SIM} && make" dv_base_dependencies=simenv docker_run_verify=\ - docker run -v ${TARGET_PATH}:${TARGET_PATH} -v ${PDK_ROOT}:${PDK_ROOT} \ + docker run \ + $(USER_ARGS) \ + -v ${TARGET_PATH}:${TARGET_PATH} -v ${PDK_ROOT}:${PDK_ROOT} \ -v ${CARAVEL_ROOT}:${CARAVEL_ROOT} \ + -v ${MCW_ROOT}:${MCW_ROOT} \ -e TARGET_PATH=${TARGET_PATH} -e PDK_ROOT=${PDK_ROOT} \ -e CARAVEL_ROOT=${CARAVEL_ROOT} \ -e TOOLS=/foss/tools/riscv-gnu-toolchain-rv32i/217e7f3debe424d61374d31e33a091a630535937 \ @@ -127,7 +148,7 @@ docker_run_verify=\ -e CORE_VERILOG_PATH=$(TARGET_PATH)/mgmt_core_wrapper/verilog \ -e CARAVEL_VERILOG_PATH=$(TARGET_PATH)/caravel/verilog \ -e MCW_ROOT=$(MCW_ROOT) \ - -u $$(id -u $$USER):$$(id -g $$USER) efabless/dv:latest \ + efabless/dv:latest \ sh -c $(verify_command) .PHONY: harden @@ -214,24 +235,53 @@ uninstall: # Default installs to the user home directory, override by "export PRECHECK_ROOT=" .PHONY: precheck precheck: + if [ -d "$(PRECHECK_ROOT)" ]; then\ + echo "Deleting exisiting $(PRECHECK_ROOT)" && \ + rm -rf $(PRECHECK_ROOT) && sleep 2;\ + fi + @echo "Installing Precheck.." @git clone --depth=1 --branch $(MPW_TAG) https://github.com/efabless/mpw_precheck.git $(PRECHECK_ROOT) @docker pull efabless/mpw_precheck:latest .PHONY: run-precheck run-precheck: check-pdk check-precheck - $(eval INPUT_DIRECTORY := $(shell pwd)) - cd $(PRECHECK_ROOT) && \ + @if [ "$$DISABLE_LVS" = "1" ]; then\ + $(eval INPUT_DIRECTORY := $(shell pwd)) \ + cd $(PRECHECK_ROOT) && \ + docker run -it -v $(PRECHECK_ROOT):$(PRECHECK_ROOT) \ + -v $(INPUT_DIRECTORY):$(INPUT_DIRECTORY) \ + -v $(PDK_ROOT):$(PDK_ROOT) \ + -e INPUT_DIRECTORY=$(INPUT_DIRECTORY) \ + -e PDK_PATH=$(PDK_ROOT)/$(PDK) \ + -e PDK_ROOT=$(PDK_ROOT) \ + -e PDKPATH=$(PDKPATH) \ + -u $(shell id -u $(USER)):$(shell id -g $(USER)) \ + efabless/mpw_precheck:latest bash -c "cd $(PRECHECK_ROOT) ; python3 mpw_precheck.py --input_directory $(INPUT_DIRECTORY) --pdk_path $(PDK_ROOT)/$(PDK) license makefile default documentation consistency gpio_defines xor magic_drc klayout_feol klayout_beol klayout_offgrid klayout_met_min_ca_density klayout_pin_label_purposes_overlapping_drawing klayout_zeroarea"; \ + else \ + $(eval INPUT_DIRECTORY := $(shell pwd)) \ + cd $(PRECHECK_ROOT) && \ + docker run -it -v $(PRECHECK_ROOT):$(PRECHECK_ROOT) \ + -v $(INPUT_DIRECTORY):$(INPUT_DIRECTORY) \ + -v $(PDK_ROOT):$(PDK_ROOT) \ + -e INPUT_DIRECTORY=$(INPUT_DIRECTORY) \ + -e PDK_PATH=$(PDK_ROOT)/$(PDK) \ + -e PDK_ROOT=$(PDK_ROOT) \ + -e PDKPATH=$(PDKPATH) \ + -u $(shell id -u $(USER)):$(shell id -g $(USER)) \ + efabless/mpw_precheck:latest bash -c "cd $(PRECHECK_ROOT) ; python3 mpw_precheck.py --input_directory $(INPUT_DIRECTORY) --pdk_path $(PDK_ROOT)/$(PDK)"; \ + fi + + +BLOCKS = $(shell cd lvs && find * -maxdepth 0 -type d) +LVS_BLOCKS = $(foreach block, $(BLOCKS), lvs-$(block)) +$(LVS_BLOCKS): lvs-% : ./lvs/%/lvs_config.json check-pdk check-precheck + @$(eval INPUT_DIRECTORY := $(shell pwd)) + @cd $(PRECHECK_ROOT) && \ docker run -v $(PRECHECK_ROOT):$(PRECHECK_ROOT) \ -v $(INPUT_DIRECTORY):$(INPUT_DIRECTORY) \ -v $(PDK_ROOT):$(PDK_ROOT) \ - -e INPUT_DIRECTORY=$(INPUT_DIRECTORY) \ - -e PDK_PATH=$(PDK_ROOT)/$(PDK) \ - -e PDK_ROOT=$(PDK_ROOT) \ - -e PDKPATH=$(PDKPATH) \ -u $(shell id -u $(USER)):$(shell id -g $(USER)) \ - efabless/mpw_precheck:latest bash -c "cd $(PRECHECK_ROOT) ; python3 mpw_precheck.py --input_directory $(INPUT_DIRECTORY) --pdk_path $(PDK_ROOT)/$(PDK)" - - + efabless/mpw_precheck:latest bash -c "export PYTHONPATH=$(PRECHECK_ROOT) ; cd $(PRECHECK_ROOT) ; python3 checks/lvs_check/lvs.py --pdk_path $(PDK_ROOT)/$(PDK) --design_directory $(INPUT_DIRECTORY) --output_directory $(INPUT_DIRECTORY)/lvs --design_name $* --config_file $(INPUT_DIRECTORY)/lvs/$*/lvs_config.json" .PHONY: clean clean: @@ -261,25 +311,54 @@ help: cd $(CARAVEL_ROOT) && $(MAKE) help @$(MAKE) -pRrq -f $(lastword $(MAKEFILE_LIST)) : 2>/dev/null | awk -v RS= -F: '/^# File/,/^# Finished Make data base/ {if ($$1 !~ "^[#.]") {print $$1}}' | sort | egrep -v -e '^[^[:alnum:]]' -e '^$@$$' +.PHONY: check_dependencies +check_dependencies: + @if [ ! -d "$(PWD)/dependencies" ]; then \ + mkdir $(PWD)/dependencies; \ + fi + export CUP_ROOT=$(shell pwd) -export TIMING_ROOT?=$(shell pwd)/deps/timing-scripts +export TIMING_ROOT?=$(shell pwd)/dependencies/timing-scripts export PROJECT_ROOT=$(CUP_ROOT) timing-scripts-repo=https://github.com/efabless/timing-scripts.git $(TIMING_ROOT): - @mkdir -p $(CUP_ROOT)/deps + @mkdir -p $(CUP_ROOT)/dependencies @git clone $(timing-scripts-repo) $(TIMING_ROOT) .PHONY: setup-timing-scripts setup-timing-scripts: $(TIMING_ROOT) @( cd $(TIMING_ROOT) && git pull ) @#( cd $(TIMING_ROOT) && git fetch && git checkout $(MPW_TAG); ) - @python3 -m venv ./venv - . ./venv/bin/activate && \ - python3 -m pip install --upgrade pip && \ - python3 -m pip install -r $(TIMING_ROOT)/requirements.txt && \ - deactivate + +.PHONY: install-caravel-cocotb +install-caravel-cocotb: + rm -rf ./venv-cocotb + $(PYTHON_BIN) -m venv ./venv-cocotb + ./venv-cocotb/bin/$(PYTHON_BIN) -m pip install --upgrade --no-cache-dir pip + ./venv-cocotb/bin/$(PYTHON_BIN) -m pip install --upgrade --no-cache-dir caravel-cocotb + +.PHONY: setup-cocotb-env +setup-cocotb-env: + @(python3 $(PROJECT_ROOT)/verilog/dv/setup-cocotb.py $(CARAVEL_ROOT) $(MCW_ROOT) $(PDK_ROOT) $(PDK) $(PROJECT_ROOT)) + +.PHONY: setup-cocotb +setup-cocotb: install-caravel-cocotb setup-cocotb-env simenv-cocotb + +.PHONY: cocotb-verify-all-rtl +cocotb-verify-all-rtl: + @(cd $(PROJECT_ROOT)/verilog/dv/cocotb && $(PROJECT_ROOT)/venv-cocotb/bin/caravel_cocotb -tl user_proj_tests/user_proj_tests.yaml ) + +.PHONY: cocotb-verify-all-gl +cocotb-verify-all-gl: + @(cd $(PROJECT_ROOT)/verilog/dv/cocotb && $(PROJECT_ROOT)/venv-cocotb/bin/caravel_cocotb -tl user_proj_tests/user_proj_tests_gl.yaml -verbosity quiet) + +$(cocotb-dv-targets-rtl): cocotb-verify-%-rtl: + @(cd $(PROJECT_ROOT)/verilog/dv/cocotb && $(PROJECT_ROOT)/venv-cocotb/bin/caravel_cocotb -t $* ) + +$(cocotb-dv-targets-gl): cocotb-verify-%-gl: + @(cd $(PROJECT_ROOT)/verilog/dv/cocotb && $(PROJECT_ROOT)/venv-cocotb/bin/caravel_cocotb -t $* -verbosity quiet) ./verilog/gl/user_project_wrapper.v: $(error you don't have $@) @@ -288,38 +367,4 @@ setup-timing-scripts: $(TIMING_ROOT) @echo "run the following:" @echo "make extract-parasitics" @echo "make create-spef-mapping" - exit 1 - -.PHONY: create-spef-mapping -create-spef-mapping: ./verilog/gl/user_project_wrapper.v - @. ./venv/bin/activate && \ - python3 $(TIMING_ROOT)/scripts/generate_spef_mapping.py \ - -i ./verilog/gl/user_project_wrapper.v \ - -o ./env/spef-mapping.tcl \ - --pdk-path $(PDK_ROOT)/$(PDK) \ - --macro-parent mprj \ - --project-root "$(CUP_ROOT)" && \ - deactivate - -.PHONY: extract-parasitics -extract-parasitics: ./verilog/gl/user_project_wrapper.v - @. ./venv/bin/activate && \ - python3 $(TIMING_ROOT)/scripts/get_macros.py \ - -i ./verilog/gl/user_project_wrapper.v \ - -o ./tmp-macros-list \ - --project-root "$(CUP_ROOT)" \ - --pdk-path $(PDK_ROOT)/$(PDK) && \ - deactivate - @cat ./tmp-macros-list | cut -d " " -f2 \ - | xargs -I % bash -c "$(MAKE) -C $(TIMING_ROOT) \ - -f $(TIMING_ROOT)/timing.mk rcx-% || echo 'Cannot extract %. Probably no def for this macro'" - @$(MAKE) -C $(TIMING_ROOT) -f $(TIMING_ROOT)/timing.mk rcx-user_project_wrapper - @cat ./tmp-macros-list - @rm ./tmp-macros-list - -.PHONY: caravel-sta -caravel-sta: ./env/spef-mapping.tcl - @$(MAKE) -C $(TIMING_ROOT) -f $(TIMING_ROOT)/timing.mk caravel-timing-typ - @$(MAKE) -C $(TIMING_ROOT) -f $(TIMING_ROOT)/timing.mk caravel-timing-fast - @$(MAKE) -C $(TIMING_ROOT) -f $(TIMING_ROOT)/timing.mk caravel-timing-slow - @echo "You can find results for all corners in $(CUP_ROOT)/signoff/caravel/openlane-signoff/timing/" + exit 1 \ No newline at end of file