suppor ngspice-41

[fishbuaa]

You did a wonderful job indeed! but there is still a question, when I used digital devices in ngspice, it made mistakes.
just like ：

. SUBCKT 74 LV08A 1 A 1 B 1 Y

• optional : DPWR_3V = $G_DPWR_3V DGND_3V = $G_DGND_3V
• params : MNTYMXDLY =0 IO_LEVEL =0
  U1 and (2) DPWR_3V DGND_3V
• 1A 1 B 1 Y
• DLY_LV08 IO_LV - A MNTYMXDLY ={ MNTYMXDLY } IO_LEVEL ={ IO_LEVEL }
  . model DLY_LV08 ugate
• ( tplhTY =7.5 ns tplhMX =12.3 ns tphlTY =7.5 ns tphlMX =12.3 ns )
  . ENDS 74 LV08A
  I thought it because eesim used ngspice 3f5, so I wonder if I can upgrate it to ngspice 41

thanks a lot！

[XuanhaoBao]

While EEsim offers many features, its support for digital circuits might not meet all requirements for detailed simulations. A practical workaround is to use SPICE subcircuits to describe the electrical characteristics of logic gates. For instance, consider this simple OR gate model employing a behavioral source:

Example OR gate model using behavioral source

.SUBCKT OR_GATE 1A 1B 1Y

• The output is high if at least one input is high.
  B1 1Y 0 V='V(1A)+V(1B) > 0.5 ? 5 : 0'
  .ENDS OR_GATE

• Circuit connections
  V1 1 0 PULSE(0 5 0 1ns 1ns 10ns 20ns)
  V2 2 0 PULSE(0 5 0 1ns 1ns 10ns 20ns)

XU1 1 2 3 OR_GATE

• Simulation commands
  .tran 1ns 100ns

.end

This approach simulates an OR gate where the output is high (5V) if at least one input is high, based on input signals represented by pulse sources. It's a straightforward method for incorporating basic digital logic into your simulations on EEsim. Furthermore, for more complex digital circuits or when detailed timing and mixed-signal simulations are necessary, I highly recommend using Verilog-A and Verilog-AMS.

Thank you.

[fishbuaa]

Thank you very much, I will try it. danchitnis had gave me some advices. Here is my last test result.It does not work. I will try your advice.

…

-------------------------------------------------------------------------------------------- I find ngspice use 'x:\Spice64\lib\ngspice\lib\digit.cm' as vpulse source and set it in 'x:\Spice64\share\ngspice\scripts\spinit' codemodel ../lib/ngspice/digital.cm my proof is that when I changed digit.cm's name, ngspice can not simulated 'test.cir'. so I modified my code: 1.get digit.cm as Uint8Array static LoadDigitalCM() { return new Promise((resolve) => { if (digital_cm !== null) { resolve(); return; } let xhr = new XMLHttpRequest(); xhr.open("GET", "/digital.cm", true); xhr.responseType = "arraybuffer"; xhr.overrideMimeType("application/octet-stream"); xhr.onreadystatechange = function () { if (xhr.readyState === 4 && xhr.status === 200) { digital_cm = new Uint8Array(xhr.response); resolve(); } }; xhr.send(); }) } 2.Write digital_cm as digit.cm into wasm, and it seems write file successfully,and I got right size. preRun: [ (pr = () => { if (digital_cm !== null) { console.log(digital_cm); FS.writeFile("/.spiceinit", "set ngbehavior=ps\nif $?xspice_enabled\ncodemodel /digital.cm\nend"); FS.writeFile('/digital.cm', digital_cm, { encoding: "binary" }); console.log('digital: ' + (FS.stat('/digital.cm')).size); } FS.writeFile("/test.cir", netList); }), ], ***@***.*** From: XuanhaoBao Date: 2024-03-12 08:16 To: danchitnis/EEsim CC: fishbuaa; Author Subject: Re: [danchitnis/EEsim] suppor ngspice-41 (Discussion #12) While EEsim offers many features, its support for digital circuits might not meet all requirements for detailed simulations. A practical workaround is to use SPICE subcircuits to describe the electrical characteristics of logic gates. For instance, consider this simple OR gate model employing a behavioral source: Example OR gate model using behavioral source .SUBCKT OR_GATE 1A 1B 1Y The output is high if at least one input is high. B1 1Y 0 V='V(1A)+V(1B) > 0.5 ? 5 : 0' .ENDS OR_GATE Circuit connections V1 1 0 PULSE(0 5 0 1ns 1ns 10ns 20ns) V2 2 0 PULSE(0 5 0 1ns 1ns 10ns 20ns) XU1 1 2 3 OR_GATE Simulation commands .tran 1ns 100ns .end This approach simulates an OR gate where the output is high (5V) if at least one input is high, based on input signals represented by pulse sources. It's a straightforward method for incorporating basic digital logic into your simulations on EEsim. Furthermore, for more complex digital circuits or when detailed timing and mixed-signal simulations are necessary, I highly recommend using Verilog-A and Verilog-AMS. Thank you. ― Reply to this email directly, view it on GitHub, or unsubscribe. You are receiving this because you authored the thread.Message ID: ***@***.***>