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If while a third of the way through displaying the top half of ram, your application has finished updating the second half of ram, and switches over, the display will finish showing the first half of ram before it starts showing the second half of ram. During that time your application might be updating the ram as it is being displayed.
There's no frame vertical sync exposed over I2C, so the only way to reduce the risk is to delay slightly after switching which half gets displayed before writing anything to the display ram.
I'm not going to add a delay in to the code, instead I'll document that your code to update the display should write to ram, then switch the display, rather than the other way around.
The text was updated successfully, but these errors were encountered:
If while a third of the way through displaying the top half of ram, your application has finished updating the second half of ram, and switches over, the display will finish showing the first half of ram before it starts showing the second half of ram. During that time your application might be updating the ram as it is being displayed.
There's no frame vertical sync exposed over I2C, so the only way to reduce the risk is to delay slightly after switching which half gets displayed before writing anything to the display ram.
I'm not going to add a delay in to the code, instead I'll document that your code to update the display should write to ram, then switch the display, rather than the other way around.
The text was updated successfully, but these errors were encountered: