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It seems that the Python space is seriously lacking a modern and high-quality library like this for Verilog/SystemVerilog manipulation.
I'm curious if you've ever thought about creating Python bindings for this library. It seems that most projects which add Python support for an underlying Rust library end up being extremely high-quality.
I think such a project would be hugely welcomed in the space, as Pyverilog and Pyslang are both quite rough and seem to lack much development support.
The text was updated successfully, but these errors were encountered:
It seems that the Python space is seriously lacking a modern and high-quality library like this for Verilog/SystemVerilog manipulation.
I'm curious if you've ever thought about creating Python bindings for this library. It seems that most projects which add Python support for an underlying Rust library end up being extremely high-quality.
I think such a project would be hugely welcomed in the space, as Pyverilog and Pyslang are both quite rough and seem to lack much development support.
The text was updated successfully, but these errors were encountered: