To do list

[cyring]

Source	Issue	State	Comments
#399	[Airmont][SMBIOS] Wrong offset	Unsolved / Closed	Past manufacturer_id field
#389	[Intel][Gemini Lake] IMC, MCHBAR	Unsolved	Registers are empty
#378	[AMD][Raphael] SVI voltage	Closed	Workaround released
#378	[AMD][Raphael] HSMP unreachable	Opened	Protocol timeout
#378	[AMD][Raphael] Kernel symbols	Closed	kernel updated
#374	[Intel][Skylake/X] Non regression	Closed	Need processor
#366	[Intel][Airmont] Z8000 IMC	Closed	#399
#313	[Intel][Cascade Lake/X] IMC	Canceled	Need to develop on processor
#410	[Intel] Hardware Duty Cycling	Unsolved / Closed	No HDC cycles on TGL
#418	zen-kernel incompatible	Closed	Possible SMU conflict

[antermin]

Regarding #366, I have Celeron(R) CPU N3150, architecture shows Atom/Airmont.

Is there anything that I can help?

[cyring]

Regarding #366, I have Celeron(R) CPU N3150, architecture shows Atom/Airmont.

Is there anything that I can help?

I believe we should rather read "Braswell" ?

EDIT: Fixed and available in the develop branch for your testings.

Can you create a new issue Celeron(R) CPU N3150 then post details from CoreFreq:

corefreq-cli -s -n -m -n -B -n -M -n -C 1

[cyring]

Spreadtrum SC9853I CPUID 06_75 perhaps Airmont compatible ?

Edit: done.

[cyring]

cpubenchmark

specdevice

xda-developers

[cyring]

13th Gen MCHBAR Memory Controller

(part 3) (part 4) (part 5)

• impacts RPL, probably ADL, decoder:
  

  CoreFreq/corefreqk.c

  Line 6145 in 34efe5d

  static PCI_CALLBACK ADL_IMC(struct pci_dev *dev)

• sub-channels are defined as a function of DDR Type

[cyring]

EPYC Embedded 9004

[cyring]

• Source: Revision Guide for AMD Family 19h Models 10h-1Fh Processors

CPUID Fn0000_0001_EAX	AMD EPYC™ 9004 Series Processors
00A10F11h (Genoa-B1)	X

[cyring]

Bergamo screenshots and more

[cyring]

As mentioned in "epyc-embedded-9004-series-product-brief" FOOTNOTES, I'm looking for "Socket SP5/SP6 Platform RAS Specification and Implementation Guide for Family 19h Model 10-1Fh" from devhub.amd.com/wp-content/uploads/Docs/57065_0.95.pdf

Anyone ?

[cyring]

EPYC Genoa #479 ; Ryzen 5 8600G #84

Refering to those issues; the remaining actions are:

• Decode geometry of new 24 and 48 GB DIMM.
• Find registers for unknown power values
• Solve TjMax and offset values [partial]
• Debug detection of IOMMU [done]

[cyring]

Activity Monitors Unit (AMU)

• CPU cycle counter: increments at the frequency of the CPU.
• Constant counter: increments at the fixed frequency of the system clock.
• Instructions retired
• Memory stall cycles

When in WFI or WFE these counters do not increment.

Prerequisite: ARMv8.4

[cyring]

AArch64

• ID_AA64MMFR4_EL1
• ID_AA64PFR2_EL1
• ID_AA64FPFR0_EL1
• MVFR0_EL1 MVFR1_EL1 MVFR2_EL1 !32-bits
• GMID_EL1
• DCZID_EL0