From 2b2462a86bdffae8ea24b201d9fc7865ff4d847b Mon Sep 17 00:00:00 2001 From: Olof Kindgren Date: Mon, 9 Mar 2020 22:13:13 +0100 Subject: [PATCH] Tie off undriven signals --- rtl/axi_uart_wrapper.v | 3 +-- rtl/swervolf_nexys.v | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/rtl/axi_uart_wrapper.v b/rtl/axi_uart_wrapper.v index 4e7a6cf..6aeb182 100644 --- a/rtl/axi_uart_wrapper.v +++ b/rtl/axi_uart_wrapper.v @@ -71,7 +71,6 @@ module axi_uart_wrapper wire psel; wire penable; wire pready; - wire pslverr; wire [7:0] wb_rdt; @@ -143,7 +142,7 @@ module axi_uart_wrapper .PWDATA (pwdata ), .PRDATA ({24'd0,wb_rdt}), .PREADY (pready ), - .PSLVERR (pslverr )); + .PSLVERR (1'b0 )); wire wb_ack; assign pready = !penable | wb_ack; diff --git a/rtl/swervolf_nexys.v b/rtl/swervolf_nexys.v index 90c48b7..4ac54d7 100644 --- a/rtl/swervolf_nexys.v +++ b/rtl/swervolf_nexys.v @@ -81,6 +81,8 @@ module swervolf_nexys_a7 assign cpu.w_user = 1'b0; assign cpu.b_user = 1'b0; assign cpu.r_user = 1'b0; + assign mem.b_user = 1'b0; + assign mem.r_user = 1'b0; axi_cdc #(.AXI_USER_WIDTH (1),