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In this project, I conducted an in-depth comparative analysis of various adder architectures to assess their performance in terms of delay and power consumption.

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Sandy71004/Adders-Analysis-Using-Xilinx-Vivado

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Adder Analysis Using Xilinx Vivado

This repository contains the implementation and analysis of various adder architectures in VLSI using Xilinx Vivado design software. The goal of this project is to compare different adder topologies based on parameters such as on-chip power consumption and delay, and to determine the most efficient adder for different applications. I have attached the bloack diagrams for below mentioned adders in this repository.

Project Description

In this project, we have implemented and analyzed the following adder architectures:

  • Carry Skip Adder (CSkA)
  • Carry Select Adder (CSlA)
  • Carry Lookahead Adder (CLA)
  • Kogge Stone Adder (KSA)
  • Brent Kung Adder (BKA)

The analysis focuses on three main parameters:

  • Utilization (in terms of LUTs and IOs) - LUTs (Look-Up Tables): This indicates the number of LUTs used by each adder. LUTs are fundamental building blocks of FPGAs, used to implement logic functions. IOs (Input/Output Pins): This represents the number of IO pins utilized by each adder. IOs are used for communication with external devices.

  • On-chip power consumption (in watts) - This parameter measures the power consumption of each adder in watts. Lower power consumption is desirable for energy efficiency, reducing heat generation, and extending the lifespan of the device.

  • Data path delay (in nanoseconds) - Logic Delay (ns): This is the time taken for the logic gates within the adder to process the input signals and produce an output. Route Delay (ns): This is the time taken for signals to travel through the routing paths between logic elements. Total Delay (ns): This is the sum of the logic delay and route delay, representing the overall time taken by the adder to process inputs and generate an output.

Key Findings

  • Brent Kung Adder (BKA) has the minimum on-chip power consumption and minimum data path delay, making it the most energy-efficient adder.
  • Carry Skip Adder (CSkA) consumes the maximum on-chip power.
  • Kogge Stone Adder (KSA) has the maximum data path delay.
  • Carry Skip Adder (CSkA) is suitable for low power applications despite its higher power consumption compared to others.

Comparison Table

S.No Adder Types Utilization (%) On-chip Power (W) Logic Delay (ns) Route Delay (ns)
LUTs IOs
1 Carry Skip Adder 4 14 2.944 5.552
2 Carry Select Adder 1 14 2.61 5.339
3 Carry Lookahead Adder 1 14 2.709 5.443
4 Kogge Stone Adder 1 14 2.675 5.344
5 Brent Kung Adder 1 14 2.598 5.223

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In this project, I conducted an in-depth comparative analysis of various adder architectures to assess their performance in terms of delay and power consumption.

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