From e9387ccca42012f744eefad75820b55586931bec Mon Sep 17 00:00:00 2001 From: Andrei Solodovnikov Date: Tue, 30 Apr 2024 10:12:00 +0300 Subject: [PATCH] =?UTF-8?q?=D0=9B=D0=A010.=20=D0=98=D1=81=D0=BF=D1=80?= =?UTF-8?q?=D0=B0=D0=B2=D0=BB=D0=B5=D0=BD=D0=B8=D0=B5=20=D1=80=D0=B0=D0=B7?= =?UTF-8?q?=D1=80=D1=8F=D0=B4=D0=BD=D0=BE=D1=81=D1=82=D0=B8=20=D0=B2=20?= =?UTF-8?q?=D0=B3=D0=BE=D1=82=D0=BE=D0=B2=D0=BE=D0=BC=20=D0=BC=D0=BE=D0=B4?= =?UTF-8?q?=D1=83=D0=BB=D0=B5?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Labs/Made-up modules/lab_10.csr.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Labs/Made-up modules/lab_10.csr.sv b/Labs/Made-up modules/lab_10.csr.sv index f6b5f3f9..f8ab0834 100644 --- a/Labs/Made-up modules/lab_10.csr.sv +++ b/Labs/Made-up modules/lab_10.csr.sv @@ -30,7 +30,7 @@ module csr_controller ( ); logic [31:0] VeD, vXRXX, Tzi1KCKE, gfnK, gaSybr; - logic mcause, mscratch; + logic [31:0] mcause, mscratch; logic asdfga; logic [31:0] fadfda; assign mscratch = Tzi1KCKE;