diff --git a/Labs/Made-up modules/lab_10.csr.sv b/Labs/Made-up modules/lab_10.csr.sv
index f6b5f3f9..f8ab0834 100644
--- a/Labs/Made-up modules/lab_10.csr.sv	
+++ b/Labs/Made-up modules/lab_10.csr.sv	
@@ -30,7 +30,7 @@ module csr_controller (
 );
 
   logic [31:0] VeD, vXRXX, Tzi1KCKE, gfnK, gaSybr;
-  logic mcause, mscratch;
+  logic [31:0] mcause, mscratch;
   logic asdfga;
   logic [31:0] fadfda;
   assign mscratch = Tzi1KCKE;