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gencpu.cpp
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gencpu.cpp
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/*
* UAE - The Un*x Amiga Emulator
*
* MC68000 emulation generator
*
* This is a fairly stupid program that generates a lot of case labels that
* can be #included in a switch statement.
* As an alternative, it can generate functions that handle specific
* MC68000 instructions, plus a prototype header file and a function pointer
* array to look up the function for an opcode.
* The generated code is sometimes sub-optimal, an optimizing compiler should
* take care of this.
*
* The source for the insn timings is Markt & Technik's Amiga Magazin 8/1992.
*
* Copyright 1995, 1996, 1997, 1998, 1999, 2000 Bernd Schmidt
*/
#define CPU_TESTER 0
#include "sysconfig.h"
#include "sysdeps.h"
#include <ctype.h>
#include "readcpu.h"
#define BOOL_TYPE "int"
/* Define the minimal 680x0 where NV flags are not affected by xBCD instructions. */
#define xBCD_KEEPS_N_FLAG 4
#define xBCD_KEEPS_V_FLAG 2
// if set: 68030 MMU and instruction's last memory access is write and it causes fault:
// instruction is considered completed, generate short bus error stack frame.
#define MMU68030_LAST_WRITE 1
static FILE *headerfile;
static FILE *stblfile;
// optional settings
static int using_always_dynamic_cycles = 1;
static int using_bus_error = 1;
static int using_prefetch, using_indirect, using_mmu;
static int using_prefetch_020, using_ce020;
static int using_exception_3;
static int using_ce;
static int using_tracer;
static int using_waitstates;
static int using_simple_cycles;
static int using_debugmem;
static int using_noflags;
static int using_test;
static int using_nocycles;
static int using_get_word_unswapped;
static int using_optimized_flags;
static int need_exception_oldpc;
static int need_special_fixup;
static int cpu_level, cpu_generic;
static int count_readp;
static int count_readw, count_readl;
static int count_writew, count_writel;
static int count_cycles, count_ncycles;
static int count_cycles_ce020;
static int count_read_ea, count_write_ea, count_cycles_ea;
static const char *mmu_postfix, *xfc_postfix;
static int memory_cycle_cnt;
static int did_prefetch;
static int ipl_fetched;
static int opcode_nextcopy;
static int disable_noflags;
static int do_always_dynamic_cycles;
#define GF_APDI 0x00001
#define GF_AD8R 0x00002
#define GF_PC8R 0x00004
#define GF_AA 0x00007
#define GF_NOREFILL 0x00008
#define GF_PREFETCH 0x00010
#define GF_FC 0x00020
#define GF_MOVE 0x00040
#define GF_IR2IRC 0x00080
#define GF_LRMW 0x00100
#define GF_NOFAULTPC 0x00200
#define GF_RMW 0x00400
#define GF_OPCE020 0x00800
#define GF_REVERSE 0x01000
#define GF_REVERSE2 0x02000
#define GF_SECONDWORDSETFLAGS 0x04000
#define GF_SECONDEA 0x08000
#define GF_NOFETCH 0x10000 // 68010
#define GF_CLR68010 0x20000 // 68010
#define GF_NOEXC3 0x40000
#define GF_EXC3 0x80000
// internal PC is 2 less than address being prefetched.
#define GF_PCM2 0x100000
// internal PC is 2 more than address being prefetched.
#define GF_PCP2 0x200000
typedef enum
{
flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_z, flag_zn,
flag_av, flag_sv
}
flagtypes;
/* For the current opcode, the next lower level that will have different code.
* Initialized to -1 for each opcode. If it remains unchanged, indicates we
* are done with that opcode. */
static int next_cpu_level;
static int *opcode_map;
static int *opcode_next_clev;
static int *opcode_last_postfix;
static unsigned long *counts;
static int generate_stbl;
static int mmufixupcnt;
static int mmufixupstate;
static int disp020cnt;
static bool candormw;
static bool genastore_done;
static char rmw_varname[100];
static struct instr *g_instr;
static char g_srcname[100];
static int loopmode;
static int loopmodeextra;
static int loopmode_set;
static int postfix;
#define GENA_GETV_NO_FETCH 0
#define GENA_GETV_FETCH 1
#define GENA_GETV_FETCH_ALIGN 2
#define GENA_MOVEM_DO_INC 0
#define GENA_MOVEM_NO_INC 1
#define GENA_MOVEM_MOVE16 2
static const char *srcl, *dstl;
static const char *srcw, *dstw;
static const char *srcb, *dstb;
static const char *srcblrmw, *srcwlrmw, *srcllrmw;
static const char *dstblrmw, *dstwlrmw, *dstllrmw;
static const char *srcbrmw, *srcwrmw, *srclrmw;
static const char *dstbrmw, *dstwrmw, *dstlrmw;
static const char *prefetch_long, *prefetch_word, *prefetch_opcode;
static const char *srcli, *srcwi, *srcbi, *nextl, *nextw;
static const char *srcld, *dstld;
static const char *srcwd, *dstwd;
static const char *do_cycles, *disp000, *disp020, *getpc;
#define fetchmode_fea 1
#define fetchmode_cea 2
#define fetchmode_fiea 3
#define fetchmode_ciea 4
#define fetchmode_jea 5
static int brace_level;
static char outbuffer[30000];
static int last_access_offset_ipl;
static int last_access_offset_ipl_prev;
static void out(const char *format, ...)
{
char outbuf[1000];
va_list parms;
va_start(parms, format);
_vsnprintf(outbuf, sizeof(outbuf) - 1, format, parms);
outbuf[sizeof(outbuf) - 1] = 0;
va_end(parms);
char *p = outbuf;
while (*p) {
char v = *p;
if (v == '\t') {
memmove(p, p + 1, strlen(p + 1) + 1);
} else {
p++;
}
}
p = outbuf;
for (;;) {
char *pe = p;
int islf = 0;
while (*pe != 0 && *pe != '\n') {
pe++;
}
if (*pe == '\n') {
islf = 1;
*pe = 0;
}
char outbuf2[1000];
strcpy(outbuf2, p);
outbuf2[pe - p] = 0;
if (outbuf2[0]) {
char *ps = outbuf2;
while (*ps) {
char v = *ps;
if (v == '}') {
brace_level--;
}
ps++;
}
for (int i = 0; i < brace_level; i++) {
strcat(outbuffer, "\t");
}
strcat(outbuffer, outbuf2);
ps = outbuf2;
while (*ps) {
char v = *ps;
if (v == '{') {
brace_level++;
}
ps++;
}
}
if (islf) {
strcat(outbuffer, "\n");
pe++;
}
if (*pe == 0)
break;
p = pe;
}
}
static void insertstring(const char *s, int offset)
{
int len = strlen(s);
memmove(outbuffer + offset + len + brace_level, outbuffer + offset, strlen(outbuffer + offset) + 1);
for (int i = 0; i < brace_level; i++) {
outbuffer[offset + i] = '\t';
}
memcpy(outbuffer + offset + brace_level, s, len);
}
static void set_last_access_ipl(void)
{
if (ipl_fetched)
return;
last_access_offset_ipl = strlen(outbuffer);
}
static void set_last_access_ipl_prev(void)
{
last_access_offset_ipl_prev = strlen(outbuffer);
}
NORETURN static void term (void)
{
out("Abort!\n");
abort();
}
NORETURN static void term (const char *err)
{
out("%s\n", err);
term();
}
static void read_counts (void)
{
FILE *file;
unsigned int opcode, count, total;
char name[20];
int nr = 0;
memset (counts, 0, 65536 * sizeof *counts);
count = 0;
file = fopen ("frequent.68k", "r");
if (file) {
if (fscanf (file, "Total: %u\n", &total) == 0) {
abort();
}
while (fscanf (file, "%x: %u %s\n", &opcode, &count, name) == 3) {
opcode_next_clev[nr] = 5;
opcode_last_postfix[nr] = -1;
opcode_map[nr++] = opcode;
counts[opcode] = count;
}
fclose (file);
}
if (nr == nr_cpuop_funcs)
return;
for (opcode = 0; opcode < 0x10000; opcode++) {
if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG
&& counts[opcode] == 0)
{
opcode_next_clev[nr] = 5;
opcode_last_postfix[nr] = -1;
opcode_map[nr++] = opcode;
counts[opcode] = count;
}
}
if (nr != nr_cpuop_funcs)
term();
}
static int genamode_cnt, genamode8r_offset[2];
static int set_fpulimit;
static int m68k_pc_offset, m68k_pc_offset_old;
static int m68k_pc_total;
static int exception_pc_offset, exception_pc_offset_extra_000;
static int branch_inst;
static int ir2irc;
static int insn_n_cycles;
static int tail_ce020, total_ce020, head_in_ea_ce020;
static bool head_ce020_cycs_done, tail_ce020_done;
static int subhead_ce020;
static struct instr *curi_ce020;
static bool no_prefetch_ce020;
static bool got_ea_ce020;
static bool needbuserror(void)
{
if (!using_bus_error)
return false;
if (using_mmu)
return false;
#if CPU_TESTER
return true;
#else
// only 68000/010 need cpuemu internal bus error handling
// 68020+ use CATCH/TRY method
if (postfix >= 10 && postfix < 20)
return true;
return false;
#endif
}
// 68010-40 needs different implementation than 68060
static bool next_level_060_to_040(void)
{
if (cpu_level >= 5) {
if (next_cpu_level < 5) {
next_cpu_level = 5 - 1;
return true;
}
}
return false;
}
// 68010-30 needs different implementation than 68040/060
static bool next_level_040_to_030(void)
{
if (cpu_level >= 4) {
if (next_cpu_level < 4) {
next_cpu_level = 4 - 1;
return true;
}
}
return false;
}
// 68000-010 needs different implementation than 68020+
static bool next_level_020_to_010(void)
{
if (cpu_level >= 2) {
if (next_cpu_level < 2) {
next_cpu_level = 2 - 1;
return true;
}
}
return false;
}
// 68000 <> 68010
static bool next_level_000(void)
{
if (next_cpu_level < 0) {
next_cpu_level = 0;
}
return false;
}
static void fpulimit (void)
{
out("\n#ifdef FPUEMU\n");
set_fpulimit = 1;
}
static int s_count_readw, s_count_readl;
static int s_count_writew, s_count_writel;
static int s_count_readp;
static int s_count_cycles, s_count_ncycles, s_insn_cycles;
static void push_ins_cnt(void)
{
s_count_readw = count_readw;
s_count_readl = count_readl;
s_count_writew = count_writew;
s_count_writel = count_writel;
s_count_readp = count_readp;
s_count_cycles = count_cycles;
s_count_ncycles = count_ncycles;
s_insn_cycles = insn_n_cycles;
}
static void pop_ins_cnt(void)
{
count_readw = s_count_readw;
count_readl = s_count_readl;
count_writew = s_count_writew;
count_writel = s_count_writel;
count_readp = s_count_readp;
count_cycles = s_count_cycles;
count_ncycles = s_count_ncycles;
insn_n_cycles = s_insn_cycles;
}
static bool needmmufixup(void)
{
if (need_special_fixup) {
// need to restore -(an)/(an)+ if unimplemented
switch (g_instr->mnemo)
{
case i_MULL:
case i_DIVL:
case i_CAS:
return true;
}
}
if (!using_mmu)
return false;
if (using_mmu == 68040 && (mmufixupstate || mmufixupcnt > 0)) {
return false;
}
if (using_mmu == 68030) {
switch (g_instr->mnemo)
{
case i_LINK:
case i_RTD:
case i_RTR:
case i_RTE:
case i_RTS:
return false;
}
}
return true;
}
static void addmmufixup(const char *reg, int size, int mode)
{
if (!needmmufixup())
return;
int flags = 0;
if (cpu_level == 3 && size >= 0 && mode >= 0) {
if (mode == Aipi) {
flags |= 0x100;
} else if (mode == Apdi) {
flags |= 0x200;
}
if (size == sz_long) {
flags |= 0x800;
} else if (size == sz_word) {
flags |= 0x400;
}
}
out("mmufixup[%d].reg = %s | 0x%x;\n", mmufixupcnt, reg, flags);
out("mmufixup[%d].value = m68k_areg(regs, %s);\n", mmufixupcnt, reg);
mmufixupstate |= 1 << mmufixupcnt;
mmufixupcnt++;
}
static void clearmmufixup(int cnt, int noclear)
{
if (mmufixupstate & (1 << cnt)) {
out("mmufixup[%d].reg = -1;\n", cnt);
if (!noclear)
mmufixupstate &= ~(1 << cnt);
}
}
static bool isce020(void)
{
if (!using_ce020)
return false;
if (using_ce020 >= 3)
return false;
return true;
}
static bool isprefetch020(void)
{
if (!using_prefetch_020)
return false;
if (using_prefetch_020 >= 3)
return false;
return true;
}
static void check_ipl(void)
{
// So far it seems 68000 IPL fetch happens when CPU is doing
// memory cycle data part followed by prefetch cycle. It must
// happen after possible bus error has been detected but before
// following prefetch memory cycle.
if (last_access_offset_ipl_prev < 0) {
set_last_access_ipl();
} else {
// if memory cycle happened previously: use it.
last_access_offset_ipl = last_access_offset_ipl_prev;
ipl_fetched = 1;
}
}
static void check_ipl_always(void)
{
if (using_ce) {
out("ipl_fetch();\n");
}
if (isce020()) {
out("ipl_fetch();\n");
}
}
static void addcycles_020(int cycles)
{
if (using_ce020) {
out("%s(%d);\n", do_cycles, cycles);
} else if (using_prefetch_020) {
out("count_cycles += %d;\n", cycles);
}
}
static void addcycles_ce020 (int cycles, const char *s)
{
if (!isce020())
return;
#if 0
if (cycles > 0) {
if (s == NULL)
out("%s(%d);\n", do_cycles, cycles);
else
out("%s(%d); /* %s */\n", do_cycles, cycles, s);
}
#endif
count_cycles += cycles;
count_cycles_ce020 += cycles;
}
static void addcycles_ce020 (int cycles)
{
addcycles_ce020 (cycles, NULL);
}
static void get_prefetch_020 (void)
{
if (!isprefetch020() || no_prefetch_ce020)
return;
out("regs.irc = %s(%d);\n", prefetch_opcode, m68k_pc_offset);
}
static void get_prefetch_020_continue(void)
{
if (!isprefetch020())
return;
get_prefetch_020();
}
static void returntail (bool iswrite)
{
if (!isce020()) {
if (isprefetch020()) {
if (!tail_ce020_done) {
if (!did_prefetch)
get_prefetch_020();
did_prefetch = 1;
tail_ce020_done = true;
}
}
return;
}
if (!tail_ce020_done) {
total_ce020 -= 2;
#if 0
if (iswrite) {
out("/* C - %d = %d */\n", memory_cycle_cnt, total_ce020 - memory_cycle_cnt);
total_ce020 -= memory_cycle_cnt;
} else {
out("/* C = %d */\n", total_ce020);
}
#endif
if (0 && total_ce020 <= 0) {
out("/* C was zero */\n");
total_ce020 = 1;
}
if (!did_prefetch)
get_prefetch_020();
if (total_ce020 > 0)
addcycles_ce020 (total_ce020);
//out("regs.irc = %s;\n", prefetch_opcode);
if (0 && total_ce020 >= 2) {
out("op_cycles = get_cycles() - op_cycles;\n");
out("op_cycles /= cpucycleunit;\n");
out("if (op_cycles < %d) {\n", total_ce020);
out("do_cycles_ce020((%d) - op_cycles);\n", total_ce020);
out("}\n");
}
#if 0
if (tail_ce020 > 0) {
out("regs.ce020_tail = %d * cpucycleunit;\n", tail_ce020);
out("regs.ce020_tail_cycles = get_cycles() + regs.ce020_tail;\n");
} else {
out("regs.ce020_tail = 0;\n");
}
#endif
tail_ce020_done = true;
}
}
static void returncycles(int cycles)
{
if (using_nocycles) {
out("return 0;\n");
return;
}
if (using_ce || using_ce020) {
#if 0
if (tail_ce020 == 0)
out("regs.ce020memcycles -= 2 * cpucycleunit; /* T=0 */ \n");
else if (tail_ce020 == 1)
out("regs.ce020memcycles -= 1 * cpucycleunit; /* T=1 */ \n");
else if (tail_ce020 == 2)
out("regs.ce020memcycles -= 0 * cpucycleunit; /* T=2 */\n");
#endif
out("return;\n");
return;
}
if (do_always_dynamic_cycles) {
int total = count_readl + count_readw + count_writel + count_writew - count_readp;
if (!total)
total++;
if (using_mmu || using_prefetch_020) {
out("return (%d * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;\n", total);
} else {
out("return (%d * CYCLE_UNIT / 2 + count_cycles) | (((%d * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);\n",
cycles, total);
}
} else if (using_simple_cycles) {
out("return %d * CYCLE_UNIT / 2 + count_cycles;\n", cycles);
} else {
out("return %d * CYCLE_UNIT / 2;\n", cycles);
}
}
static void write_return_cycles_none(void)
{
if (using_ce || using_ce020) {
out("return;\n");
} else {
out("return 0;\n");
}
}
static void write_return_cycles2(int end, int no4)
{
if (end <= 0) {
clearmmufixup(0, 1);
clearmmufixup(1, 1);
}
if (using_ce || using_prefetch) {
if (end < 0) {
if (using_ce) {
out("return;\n");
} else {
out("return 0;\n");
}
} else {
int cc = count_cycles;
if (count_readw + count_writew + count_readl + count_writel + cc == 0 && !no4)
cc = 4;
returncycles((count_readw + count_writew) * 4 + (count_readl + count_writel) * 8 + cc);
if (end) {
out("}\n");
out("/* %d%s (%d/%d)",
(count_readw + count_writew) * 4 + (count_readl + count_writel) * 8 + cc, count_ncycles ? "+" : "",
count_readw + count_readl * 2, count_writew + count_writel * 2);
out(" */\n");
}
}
} else {
if (end < 0) {
if (using_ce020) {
out("return;\n");
} else {
out("return 0;\n");
}
} else {
if (!using_prefetch && !using_prefetch_020) {
returncycles((count_readw + count_writew) * 4 + (count_readl + count_writel) * 8 + insn_n_cycles);
} else {
returncycles((count_readw + count_writew) * 4 + (count_readl + count_writel) * 8 + count_cycles);
}
if (end) {
out("}\n");
}
}
}
}
static void write_return_cycles(int end)
{
write_return_cycles2(end, 0);
}
static void write_return_cycles_noadd(int end)
{
write_return_cycles2(end, 1);
}
static void addcycles_ce020 (const char *name, int head, int tail, int cycles)
{
if (!isce020())
return;
if (!head && !tail && !cycles)
return;
out("/* %s H:%d,T:%d,C:%d */\n", name, head, tail, cycles);
}
static void addcycles_ce020 (const char *name, int head, int tail, int cycles, int ophead)
{
if (!isce020())
return;
if (!head && !tail && !cycles && !ophead) {
out("/* OP zero */\n");
return;
}
count_cycles += cycles;
if (!ophead) {
addcycles_ce020 (name, head, tail, cycles);
} else if (ophead > 0) {
out("/* %s H:%d-,T:%d,C:%d */\n", name, head, tail, cycles);
} else {
out("/* %s H:%d+,T:%d,C:%d */\n", name, head, tail, cycles);
}
}
static void addcycles000_nonces(const char *sc)
{
if (using_nocycles) {
return;
}
if (using_simple_cycles || do_always_dynamic_cycles) {
out("count_cycles += (%s) * CYCLE_UNIT / 2;\n", sc);
count_ncycles++;
}
}
static void addcycles000_nonce(int c)
{
if (using_nocycles) {
return;
}
if (using_simple_cycles || do_always_dynamic_cycles) {
out("count_cycles += %d * CYCLE_UNIT / 2;\n", c);
count_ncycles++;
}
}
static void addcycles000_onlyce (int cycles)
{
if (using_ce) {
out("%s(%d);\n", do_cycles, cycles);
}
}
static void addcycles000(int cycles)
{
if (using_ce) {
out("%s(%d);\n", do_cycles, cycles);
}
count_cycles += cycles;
insn_n_cycles += cycles;
}
#if 0
static void addcycles000_2(int cycles)
{
if (using_ce) {
out("%s(%d);\n", do_cycles, cycles);
}
count_cycles += cycles;
insn_n_cycles += cycles;
}
#endif
static void addcycles000_3(void)
{
if (using_ce) {
out("if (cycles > 0) %s(cycles);\n", do_cycles);
}
count_ncycles++;
}
static int isreg (amodes mode)
{
if (mode == Dreg || mode == Areg)
return 1;
return 0;
}
static int bit_size (int size)
{
switch (size) {
case sz_byte: return 8;
case sz_word: return 16;
case sz_long: return 32;
default: term();
}
return 0;
}
static const char *bit_mask (int size)
{
switch (size) {
case sz_byte: return "0xff";
case sz_word: return "0xffff";
case sz_long: return "0xffffffff";
default: term();
}
return 0;
}
static void swap_opcode(void)
{
if (using_get_word_unswapped) {
out("\topcode = do_byteswap_16(opcode);\n");
}
}
static void real_opcode(int *have)
{
if (!*have) {
if (using_get_word_unswapped) {
out("\tuae_u32 real_opcode = do_byteswap_16(opcode);\n");
} else {
out("\tuae_u32 real_opcode = opcode;\n");
}
*have = 1;
}
}
static int mmu040_movem;
static void start_mmu040_movem(int movem)
{
if (abs(movem) != 3)
return;
out("if (mmu040_movem) {\n");
out("srca = mmu040_movem_ea;\n");
out("} else {\n");
mmu040_movem = 1;
}
static void end_mmu040_movem(void)
{
if (!mmu040_movem)
return;
out("}\n");
mmu040_movem = 0;
}
static void setpcstring(char *dst, const char *format, ...)
{
va_list parms;
char buffer[1000];
va_start(parms, format);
_vsnprintf(buffer, 1000 - 1, format, parms);
va_end(parms);
if (using_mmu)
sprintf(dst, "m68k_setpci(%s);\n", buffer);
else if (using_prefetch || using_prefetch_020 || using_test)
sprintf(dst, "m68k_setpci_j(%s);\n", buffer);
else
sprintf(dst, "m68k_setpc_j(%s);\n", buffer);
}
static void setpc(const char *format, ...)
{
va_list parms;
char buffer[1000];
va_start(parms, format);
_vsnprintf(buffer, 1000 - 1, format, parms);
va_end(parms);
if (using_mmu)
out("m68k_setpci(%s);\n", buffer);
else if (using_prefetch || using_prefetch_020 || using_test)
out("m68k_setpci_j(%s);\n", buffer);
else
out("m68k_setpc_j(%s);\n", buffer);
}
static void incpc(const char *format, ...)
{
va_list parms;
char buffer[1000];
va_start(parms, format);
_vsnprintf(buffer, 1000 - 1, format, parms);
va_end(parms);
if (using_mmu || using_prefetch || using_prefetch_020 || using_test)
out("m68k_incpci(%s);\n", buffer);
else
out("m68k_incpc(%s);\n", buffer);
}
static void sync_m68k_pc(void)
{
m68k_pc_offset_old = m68k_pc_offset;
if (m68k_pc_offset == 0)
return;
incpc("%d", m68k_pc_offset);
m68k_pc_total += m68k_pc_offset;
m68k_pc_offset = 0;
}
static void clear_m68k_offset(void)
{
m68k_pc_total += m68k_pc_offset;
m68k_pc_offset = 0;
}
static void sync_m68k_pc_noreset(void)
{
sync_m68k_pc();
m68k_pc_offset = m68k_pc_offset_old;
}
static char bus_error_text[200];
static int bus_error_specials;
static int bus_error_cycles;
// 1 = first access, 2 = long second access only
static char bus_error_code[1000], bus_error_code2[1000];
static void do_instruction_buserror(void)
{
if (!needbuserror())
return;
if (bus_error_text[0]) {
out("if(hardware_bus_error) {\n");
out("int pcoffset = 0;\n");
if (bus_error_code[0])
out("%s", bus_error_code);
out("%s", bus_error_text);
write_return_cycles(0);
out("}\n");
}
bus_error_code[0] = 0;
bus_error_specials = 0;
}
static void check_bus_error_ins(int offset, int pcoffset)
{
const char *opcode;
if (bus_error_specials) {
opcode = "0";
} else {
opcode = "opcode";
}
if (pcoffset == -1) {
sprintf(bus_error_text, "exception2_fetch(%s, %d, pcoffset);\n", opcode, offset);
} else {
sprintf(bus_error_text, "exception2_fetch(%s, %d, %d);\n", opcode, offset, pcoffset);
}
}
static void check_bus_error_ins_opcode(int offset, int pcoffset)
{
const char *opcode;
if (bus_error_specials) {
opcode = "0";
} else {
opcode = "opcode";
}
if (pcoffset == -1) {
sprintf(bus_error_text, "exception2_fetch_opcode(%s, %d, pcoffset);\n", opcode, offset);
} else {
sprintf(bus_error_text, "exception2_fetch_opcode(%s, %d, %d);\n", opcode, offset, pcoffset);
}
}
static void check_prefetch_bus_error(int offset, int pcoffset, int secondprefetchmode)
{
if (!needbuserror())
return;
if (offset < 0) {
if (offset == -1)
offset = 0;
else
offset = 2;
// full prefetch: opcode field is zero
if ((offset == 2 && !secondprefetchmode) || secondprefetchmode > 0) {
bus_error_specials = 1;
}
}