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Register Pressure for CUDA backend #1

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hdelan opened this issue May 3, 2023 · 1 comment
Open

Register Pressure for CUDA backend #1

hdelan opened this issue May 3, 2023 · 1 comment

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@hdelan
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hdelan commented May 3, 2023

Hi Salvatore, we were speaking at SYCLcon about your work with SYCL. You were having some problems with register pressure for the CUDA backend.

I found this compiler flag which may be of interest:

-mllvm -nvptx-sched4reg=true

This allows PTX code to be rearranged/rescheduled in an attempt to lower register usage. Let me know if this helps at all.

All the best!
@svtcli
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svtcli commented Jun 13, 2023

Thank you @hdelan and sorry for noticing this issue before, I will definitely try and report here!

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@hdelan @svtcli