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Increase stream filename length to CX (512) from CL (256) #265

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merged 4 commits into from
Mar 30, 2024
Merged

Increase stream filename length to CX (512) from CL (256) #265

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d59db77
Increase stream filename length to CX (512) from CL (256)
ekluzek Mar 26, 2024
4c1f6dd
Move testlist from cheyenne to derecho resolving #265
ekluzek Mar 26, 2024
8c13579
Change more references of Cheyenne to Derecho in test lists and in da…
ekluzek Mar 26, 2024
742bdaf
Remove _Vnuopc in testlists since NUOPC is the default and this is un…
ekluzek Mar 26, 2024
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68 changes: 34 additions & 34 deletions cime_config/testdefs/testlist_cdeps.xml
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,97 +1,97 @@
<?xml version="1.0"?>
<testlist version="2.0">

<test compset="2000_DATM%QIA_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%QIA_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%CRUv7_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%CRUv7_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="HIST_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="HIST_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="1850_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="1850_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2010_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="2010_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="SSP585_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="SSP585_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%NLDAS2_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%NLDAS2_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%NYF_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%NYF_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%IAF_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%IAF_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%JRA_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="TL319_t061" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%JRA_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="TL319_t061" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%JRA-1p4-2018_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="TL319_t061" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%JRA-1p4-2018_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="TL319_t061" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%1PT_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="1x1_mexicocityMEX" name="SMS_Vnuopc_Ld5_P1" testmods="datm/1PT">
<test compset="2000_DATM%1PT_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="1x1_mexicocityMEX" name="SMS_Ld5_P1" testmods="datm/1PT">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
Expand All @@ -100,25 +100,25 @@
<!-- ================================= -->
<!-- DOCN testing -->
<!-- ================================= -->
<test compset="2000_SATM_SLND_SICE_DOCN%DOM_SROF_SGLC_SWAV" grid="f09_f09_mg17" name="SMS_Vnuopc_Ln5">
<test compset="2000_SATM_SLND_SICE_DOCN%DOM_SROF_SGLC_SWAV" grid="f09_f09_mg17" name="SMS_Ln5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="HIST_SATM_SLND_SICE_DOCN%DOM_SROF_SGLC_SWAV" grid="f09_f09_mg17" name="SMS_Vnuopc_Ln5">
<test compset="HIST_SATM_SLND_SICE_DOCN%DOM_SROF_SGLC_SWAV" grid="f09_f09_mg17" name="SMS_Ln5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%QIA_SLND_SICE_DOCN%SOMAQP_SROF_SGLC_SWAV" grid="f19_f19_mg17" name="SMS_Vnuopc_Ln5">
<test compset="2000_DATM%QIA_SLND_SICE_DOCN%SOMAQP_SROF_SGLC_SWAV" grid="f19_f19_mg17" name="SMS_Ln5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
Expand All @@ -127,9 +127,9 @@
<!-- ================================= -->
<!-- DLND testing -->
<!-- ================================= -->
<test compset="1850_SATM_DLND%SCPL_SICE_SOCN_SROF_SGLC_SWAV" grid="f09_f09_mg17" name="SMS_Vnuopc_Ld3">
<test compset="1850_SATM_DLND%SCPL_SICE_SOCN_SROF_SGLC_SWAV" grid="f09_f09_mg17" name="SMS_Ld3">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
Expand All @@ -138,9 +138,9 @@
<!-- ================================= -->
<!-- DWAV testing -->
<!-- ================================= -->
<test compset="2000_SATM_SLND_SICE_SOCN_SROF_SGLC_DWAV%CLIMO" grid="ww3a" name="SMS_Vnuopc_Ld2">
<test compset="2000_SATM_SLND_SICE_SOCN_SROF_SGLC_DWAV%CLIMO" grid="ww3a" name="SMS_Ld2">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
Expand Down
54 changes: 27 additions & 27 deletions datm/cime_config/testdefs/testlist_datm.xml
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Original file line number Diff line number Diff line change
Expand Up @@ -3,108 +3,108 @@

<test compset="2000_DATM%QIA_SLND_DICE%SSMI_DOCN%DOM_SROF_SGLC_SWAV" grid="T42_T42" name="SMS_Ln9_P1" testmods="datm/scam">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
</test>
<test compset="2000_DATM%QIA_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%QIA_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%CRUv7_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%CRUv7_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="HIST_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="HIST_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="1850_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="1850_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2010_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="2010_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="SSP585_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="SSP585_DATM%GSWP3v1_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%NLDAS2_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%NLDAS2_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="f10_f10_mg37" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%NYF_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%NYF_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%IAF_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%IAF_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%JRA_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="TL319_t061" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%JRA_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="TL319_t061" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%JRA-1p4-2018_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="TL319_t061" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%JRA-1p4-2018_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="TL319_t061" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%1PT_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="1x1_mexicocityMEX" name="SMS_Vnuopc_Ld5_P1" testmods="datm/1PT">
<test compset="2000_DATM%1PT_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="1x1_mexicocityMEX" name="SMS_Ld5_P1" testmods="datm/1PT">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%ERA5_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="TL319_t061" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%ERA5_SLND_SICE_SOCN_SROF_SGLC_SWAV_SESP" grid="TL319_t061" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho" compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
Expand Down
8 changes: 4 additions & 4 deletions dice/cime_config/testdefs/testlist_dice.xml
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Original file line number Diff line number Diff line change
@@ -1,17 +1,17 @@
<?xml version="1.0"?>
<testlist version="2.0">

<test compset="2000_DATM%NYF_SLND_DICE%SSMI_DOCN%DOM_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%NYF_SLND_DICE%SSMI_DOCN%DOM_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho"compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%NYF_SLND_DICE%IAF_DOCN%DOM_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Vnuopc_Ld5">
<test compset="2000_DATM%NYF_SLND_DICE%IAF_DOCN%DOM_SROF_SGLC_SWAV_SESP" grid="T62_g17" name="SMS_Ld5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho"compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
Expand Down
4 changes: 2 additions & 2 deletions dlnd/cime_config/testdefs/testlist_dlnd.xml
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Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
<?xml version="1.0"?>
<testlist version="2.0">

<test compset="1850_SATM_DLND%SCPL_SICE_SOCN_SROF_SGLC_SWAV" grid="f09_f09_mg17" name="SMS_Vnuopc_Ld3">
<test compset="1850_SATM_DLND%SCPL_SICE_SOCN_SROF_SGLC_SWAV" grid="f09_f09_mg17" name="SMS_Ld3">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho"compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
Expand Down
2 changes: 1 addition & 1 deletion doc/source/datm.rst
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Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ ERA5 (``datm_datamode_era5_mod.F90``)

.. note::
Due to the high temporal and spatial resoultion of ERA5 dataset, only 2019
data is staged on NCAR's Cheyenne platform under
data is staged on NCAR's Derecho platform under
`$CESMDATAROOT/inputdata/atm/datm7/ERA5`

.. note::
Expand Down
12 changes: 6 additions & 6 deletions docn/cime_config/testdefs/testlist_docn.xml
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Original file line number Diff line number Diff line change
@@ -1,25 +1,25 @@
<?xml version="1.0"?>
<testlist version="2.0">

<test compset="2000_DATM%QIA_SLND_SICE_DOCN%DOM_SROF_SGLC_SWAV" grid="f19_f19_mg17" name="SMS_Vnuopc_Ln5">
<test compset="2000_DATM%QIA_SLND_SICE_DOCN%DOM_SROF_SGLC_SWAV" grid="f19_f19_mg17" name="SMS_Ln5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho"compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="HIST_DATM%QIA_SLND_SICE_DOCN%DOM_SROF_SGLC_SWAV" grid="f19_f19_mg17" name="SMS_Vnuopc_Ln5">
<test compset="HIST_DATM%QIA_SLND_SICE_DOCN%DOM_SROF_SGLC_SWAV" grid="f19_f19_mg17" name="SMS_Ln5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho"compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
</options>
</test>
<test compset="2000_DATM%QIA_SLND_SICE_DOCN%SOMAQP_SROF_SGLC_SWAV" grid="f19_f19_mg17" name="SMS_Vnuopc_Ln5">
<test compset="2000_DATM%QIA_SLND_SICE_DOCN%SOMAQP_SROF_SGLC_SWAV" grid="f19_f19_mg17" name="SMS_Ln5">
<machines>
<machine name="cheyenne" compiler="intel" category="aux_cdeps"/>
<machine name="derecho"compiler="intel" category="aux_cdeps"/>
</machines>
<options>
<option name="wallclock"> 00:10:00 </option>
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