From 6ecd0ce20675c2b299ab54b1cf95898ed6f65ec3 Mon Sep 17 00:00:00 2001 From: Abhinav Anil Sharma Date: Fri, 1 Dec 2023 00:57:48 -0500 Subject: [PATCH 1/4] i#5505 kernel trace: Support privileged xsaves xrstors instrs Adds support for yet more privileged opcodes seen in traces collected using Intel-PT. Issue: #5505, #3578 --- core/ir/x86/decode_table.c | 22 ++++++-- core/ir/x86/instr_create_api.h | 13 +++++ core/ir/x86/opcode_api.h | 4 ++ suite/tests/api/ir_x86_1args.h | 4 ++ .../test_decenc/drdecode_decenc_x86.expect | 54 +++++++++++++++++++ .../test_decenc/drdecode_decenc_x86_64.expect | 16 ++++++ .../binutils/test_decenc/test_decenc_x86.asm | 12 +++++ .../test_decenc/test_decenc_x86_64.asm | 21 ++++++++ 8 files changed, 143 insertions(+), 3 deletions(-) diff --git a/core/ir/x86/decode_table.c b/core/ir/x86/decode_table.c index 0c505cb13ec..a9bc1393d54 100644 --- a/core/ir/x86/decode_table.c +++ b/core/ir/x86/decode_table.c @@ -1626,7 +1626,15 @@ const instr_info_t * const op_instr[] = /* Supervisor Mode Access Prevention (SMAP) */ /* OP_clac */ &rm_extensions[1][2], - /* OP_stac */ &rm_extensions[1][3] + /* OP_stac */ &rm_extensions[1][3], + + /* Supervisor versions of save/restore processor extended + * state operations. + */ + /* OP_xsaves32 */ &rex_w_extensions[6][0], + /* OP_xsaves64 */ &rex_w_extensions[6][1], + /* OP_xrstors32 */ &rex_w_extensions[7][0], + /* OP_xrstors64 */ &rex_w_extensions[7][1], }; @@ -2949,9 +2957,9 @@ const instr_info_t base_extensions[][8] = { {INVALID, 0x0fc730, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA}, {OP_cmpxchg8b, 0x0fc731, catUncategorized, "cmpxchg8b", Mq_dq, eAX, Mq_dq, eAX, eDX, mrm_xop, fWZ, exop[0x07]},/*"cmpxchg16b" w/ rex.w*/ {INVALID, 0x0fc732, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA}, - {INVALID, 0x0fc733, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA}, + {REX_W_EXT, 0x0fc733, catUncategorized, "(rex.w ext 7)", xx, xx, xx, xx, xx, mrm, x, 7}, {REX_W_EXT, 0x0fc734, catUncategorized, "(rex.w ext 5)", xx, xx, xx, xx, xx, mrm, x, 5}, - {INVALID, 0x0fc735, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA}, + {REX_W_EXT, 0x0fc735, catUncategorized, "(rex.w ext 6)", xx, xx, xx, xx, xx, mrm, x, 6}, {MOD_EXT, 0x0fc736, catUncategorized, "(group 9 mod ext 12)", xx, xx, xx, xx, xx, mrm, x, 12}, {MOD_EXT, 0x0fc737, catUncategorized, "(mod ext 13)", xx, xx, xx, xx, xx, mrm, x, 13}, }, @@ -7238,6 +7246,14 @@ const instr_info_t rex_w_extensions[][2] = { {OP_xsavec32, 0x0fc734, catFP | catState, "xsavec", Mxsave, xx, edx, eax, xx, mrm, x, END_LIST}, {OP_xsavec64, 0x0fc734, catFP | catState, "xsavec64", Mxsave, xx, edx, eax, xx, mrm|rex, o64, END_LIST}, }, + { /* rex.w extension 6 */ + {OP_xsaves32, 0x0fc735, catFP | catState, "xsaves", Mxsave, xx, edx, eax, xx, mrm, x, END_LIST}, + {OP_xsaves64, 0x0fc735, catFP | catState, "xsaves64", Mxsave, xx, edx, eax, xx, mrm|rex, o64, END_LIST}, + }, + { /* rex.w extension 7 */ + {OP_xrstors32, 0x0fc733, catFP | catState, "xrstors", xx, xx, Mxsave, edx, eax, mrm, x, END_LIST}, + {OP_xrstors64, 0x0fc733, catFP | catState, "xrstors64", xx, xx, Mxsave, edx, eax, mrm|rex, o64, END_LIST}, + }, }; /**************************************************************************** diff --git a/core/ir/x86/instr_create_api.h b/core/ir/x86/instr_create_api.h index 8444dd6b8c8..aa4dc4c66a6 100644 --- a/core/ir/x86/instr_create_api.h +++ b/core/ir/x86/instr_create_api.h @@ -966,6 +966,10 @@ #define INSTR_CREATE_xrstor32(dc, s) \ instr_create_0dst_3src((dc), OP_xrstor32, (s), opnd_create_reg(DR_REG_EDX), \ opnd_create_reg(DR_REG_EAX)) +#define INSTR_CREATE_xrstors32(dc, s) \ + instr_create_0dst_3src((dc), OP_xrstors32, (s), opnd_create_reg(DR_REG_EDX), \ + opnd_create_reg(DR_REG_EAX)) + /** * This INSTR_CREATE_xxx macro creates an instr_t with opcode OP_xxx, automatically * supplying any implicit operands. @@ -976,6 +980,9 @@ #define INSTR_CREATE_xrstor64(dc, s) \ instr_create_0dst_3src((dc), OP_xrstor64, (s), opnd_create_reg(DR_REG_EDX), \ opnd_create_reg(DR_REG_EAX)) +#define INSTR_CREATE_xrstors64(dc, s) \ + instr_create_0dst_3src((dc), OP_xrstors64, (s), opnd_create_reg(DR_REG_EDX), \ + opnd_create_reg(DR_REG_EAX)) /** @} */ /* end doxygen group */ /** @name No destination, 3 sources */ @@ -3250,9 +3257,15 @@ #define INSTR_CREATE_xsave32(dc, d) \ instr_create_1dst_2src((dc), OP_xsave32, (d), opnd_create_reg(DR_REG_EDX), \ opnd_create_reg(DR_REG_EAX)) +#define INSTR_CREATE_xsaves32(dc, d) \ + instr_create_1dst_2src((dc), OP_xsaves32, (d), opnd_create_reg(DR_REG_EDX), \ + opnd_create_reg(DR_REG_EAX)) #define INSTR_CREATE_xsave64(dc, d) \ instr_create_1dst_2src((dc), OP_xsave64, (d), opnd_create_reg(DR_REG_EDX), \ opnd_create_reg(DR_REG_EAX)) +#define INSTR_CREATE_xsaves64(dc, d) \ + instr_create_1dst_2src((dc), OP_xsaves64, (d), opnd_create_reg(DR_REG_EDX), \ + opnd_create_reg(DR_REG_EAX)) #define INSTR_CREATE_xsaveopt32(dc, d) \ instr_create_1dst_2src((dc), OP_xsaveopt32, (d), opnd_create_reg(DR_REG_EDX), \ opnd_create_reg(DR_REG_EAX)) diff --git a/core/ir/x86/opcode_api.h b/core/ir/x86/opcode_api.h index 4272edd1976..f7b357a7fb0 100644 --- a/core/ir/x86/opcode_api.h +++ b/core/ir/x86/opcode_api.h @@ -1617,6 +1617,10 @@ enum { /* Supervisor Mode Access Prevention (SMAP) */ /* 1435 */ OP_clac, /* 1436 */ OP_stac, + /* 1437 */ OP_xsaves32, + /* 1438 */ OP_xsaves64, + /* 1439 */ OP_xrstors32, + /* 1440 */ OP_xrstors64, OP_AFTER_LAST, OP_FIRST = OP_add, /**< First real opcode. */ OP_LAST = OP_AFTER_LAST - 1, /**< Last real opcode. */ diff --git a/suite/tests/api/ir_x86_1args.h b/suite/tests/api/ir_x86_1args.h index 47d85ed3f3f..64a414ce232 100644 --- a/suite/tests/api/ir_x86_1args.h +++ b/suite/tests/api/ir_x86_1args.h @@ -111,9 +111,13 @@ OPCODE(vmptrld, vmptrld, vmptrld, X64_ONLY, MEMARG(OPSZ_8)) OPCODE(vmxon, vmxon, vmxon, X64_ONLY, MEMARG(OPSZ_8)) OPCODE(vmclear, vmclear, vmclear, X64_ONLY, MEMARG(OPSZ_8)) OPCODE(xsave32, xsave32, xsave32, 0, MEMARG(OPSZ_xsave)) +OPCODE(xsaves32, xsaves32, xsaves32, 0, MEMARG(OPSZ_xsave)) OPCODE(xsave64, xsave64, xsave64, X64_ONLY, MEMARG(OPSZ_xsave)) +OPCODE(xsaves64, xsaves64, xsaves64, X64_ONLY, MEMARG(OPSZ_xsave)) OPCODE(xrstor32, xrstor32, xrstor32, 0, MEMARG(OPSZ_xsave)) +OPCODE(xrstors32, xrstors32, xrstors32, 0, MEMARG(OPSZ_xsave)) OPCODE(xrstor64, xrstor64, xrstor64, X64_ONLY, MEMARG(OPSZ_xsave)) +OPCODE(xrstors64, xrstors64, xrstors64, X64_ONLY, MEMARG(OPSZ_xsave)) OPCODE(xsaveopt32, xsaveopt32, xsaveopt32, 0, MEMARG(OPSZ_xsave)) OPCODE(xsaveopt64, xsaveopt64, xsaveopt64, X64_ONLY, MEMARG(OPSZ_xsave)) OPCODE(xsavec32, xsavec32, xsavec32, 0, MEMARG(OPSZ_xsave)) diff --git a/third_party/binutils/test_decenc/drdecode_decenc_x86.expect b/third_party/binutils/test_decenc/drdecode_decenc_x86.expect index 1801e89ca5f..9e3d1dd386a 100644 --- a/third_party/binutils/test_decenc/drdecode_decenc_x86.expect +++ b/third_party/binutils/test_decenc/drdecode_decenc_x86.expect @@ -138762,6 +138762,60 @@ test_s: 7b 00 00 00 62 f2 7d 29 91 b4 f5 vpgatherqd 0x0000007b(%ebp,%ymm6,8), %ymm6 {%k1} {%k1} 7b 00 00 00 + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 0f c7 28 xsaves (%eax) + 0f c7 ac f4 c0 1d fe xsaves -0x0001e240(%esp,%esi,8) + ff + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 0f c7 18 xrstors (%eax) + 0f c7 1b xrstors (%ebx) + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 90 nop + 0f 01 ca clac 0f 01 cb stac 90 nop diff --git a/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect b/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect index 04fa5247dd0..9bfd3206976 100644 --- a/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect +++ b/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect @@ -102826,6 +102826,22 @@ test_x86_64_s: c4 e2 59 53 11 vpdpwssds %xmm4, (%rcx), %xmm2 62 b2 5d 08 53 d6 vpdpwssds %xmm4, %xmm22, %xmm2 {%k0} 62 d2 5d 08 50 d4 vpdpbusd %xmm4, %xmm12, %xmm2 {%k0} + 0f c7 28 xsaves (%rax) + 0f c7 ac f0 23 01 00 xsaves 0x00000123(%rax,%rsi,8) + 00 + 48 0f c7 28 xsaves64 (%rax) + 4a 0f c7 ac f0 23 01 xsaves64 0x00000123(%rax,%r14,8) + 00 00 + 0f c7 18 xrstors (%rax) + 41 0f c7 18 xrstors (%r8) + 41 0f c7 1c 00 xrstors (%r8,%rax) + 42 0f c7 1c 00 xrstors (%rax,%r8) + 43 0f c7 1c 38 xrstors (%r8,%r15) + 48 0f c7 18 xrstors64 (%rax) + 49 0f c7 18 xrstors64 (%r8) + 49 0f c7 1c 00 xrstors64 (%r8,%rax) + 4a 0f c7 1c 00 xrstors64 (%rax,%r8) + 4b 0f c7 1c 38 xrstors64 (%r8,%r15) 0f 01 ca clac 0f 01 cb stac 90 nop diff --git a/third_party/binutils/test_decenc/test_decenc_x86.asm b/third_party/binutils/test_decenc/test_decenc_x86.asm index 1a0ee210522..5cb4ca6c99e 100644 --- a/third_party/binutils/test_decenc/test_decenc_x86.asm +++ b/third_party/binutils/test_decenc/test_decenc_x86.asm @@ -139588,6 +139588,18 @@ GLOBAL_LABEL(FUNCNAME:) RAW(7b) RAW(00) RAW(00) RAW(00) RAW(62) RAW(f2) RAW(7d) RAW(29) RAW(91) RAW(b4) RAW(f5) RAW(7b) RAW(00) RAW(00) RAW(00) + END_OF_SUBTEST_MARKER + + /* xsaves.s */ + RAW(0f) RAW(c7) RAW(28) + RAW(0f) RAW(c7) RAW(ac) RAW(f4) RAW(c0) RAW(1d) RAW(fe) + RAW(ff) + END_OF_SUBTEST_MARKER + + /* xrstors.s */ + RAW(0f) RAW(c7) RAW(18) + RAW(0f) RAW(c7) RAW(1b) + END_OF_SUBTEST_MARKER /* TODO i#5505: Move the following back under * arch_13.s in a separate PR to keep the huge diff --git a/third_party/binutils/test_decenc/test_decenc_x86_64.asm b/third_party/binutils/test_decenc/test_decenc_x86_64.asm index 3527f297855..c065c791307 100644 --- a/third_party/binutils/test_decenc/test_decenc_x86_64.asm +++ b/third_party/binutils/test_decenc/test_decenc_x86_64.asm @@ -106651,6 +106651,27 @@ GLOBAL_LABEL(FUNCNAME:) RAW(62) RAW(b2) RAW(5d) RAW(08) RAW(53) RAW(d6) RAW(62) RAW(d2) RAW(5d) RAW(08) RAW(50) RAW(d4) + /* x86_64_xsaves.s */ + RAW(0f) RAW(c7) RAW(28) + RAW(0f) RAW(c7) RAW(ac) RAW(f0) RAW(23) RAW(01) + RAW(00) RAW(00) + RAW(48) RAW(0f) RAW(c7) RAW(28) + RAW(4a) RAW(0f) RAW(c7) RAW(ac) RAW(f0) RAW(23) RAW(01) + RAW(00) RAW(00) + + /* x86_64_xrstors.s */ + RAW(0f) RAW(c7) RAW(18) + RAW(41) RAW(0f) RAW(c7) RAW(18) + RAW(41) RAW(0f) RAW(c7) RAW(1c) RAW(00) + RAW(42) RAW(0f) RAW(c7) RAW(1c) RAW(00) + RAW(43) RAW(0f) RAW(c7) RAW(1c) RAW(38) + RAW(48) RAW(0f) RAW(c7) RAW(18) + RAW(49) RAW(0f) RAW(c7) RAW(18) + RAW(49) RAW(0f) RAW(c7) RAW(1c) RAW(00) + RAW(4a) RAW(0f) RAW(c7) RAW(1c) RAW(00) + RAW(4b) RAW(0f) RAW(c7) RAW(1c) RAW(38) + + /* TODO i#5505: Move the following back under * x86_64_arch_3.s in a separate PR to keep the huge * diff isolated from PR #6484. From 725b7c6d347b871d45ff6961b4ca87c5a3c2784a Mon Sep 17 00:00:00 2001 From: Abhinav Anil Sharma Date: Fri, 1 Dec 2023 01:00:42 -0500 Subject: [PATCH 2/4] Clang format --- third_party/binutils/test_decenc/test_decenc_x86.asm | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/third_party/binutils/test_decenc/test_decenc_x86.asm b/third_party/binutils/test_decenc/test_decenc_x86.asm index 5cb4ca6c99e..12519a191ef 100644 --- a/third_party/binutils/test_decenc/test_decenc_x86.asm +++ b/third_party/binutils/test_decenc/test_decenc_x86.asm @@ -139588,7 +139588,7 @@ GLOBAL_LABEL(FUNCNAME:) RAW(7b) RAW(00) RAW(00) RAW(00) RAW(62) RAW(f2) RAW(7d) RAW(29) RAW(91) RAW(b4) RAW(f5) RAW(7b) RAW(00) RAW(00) RAW(00) - END_OF_SUBTEST_MARKER + END_OF_SUBTEST_MARKER /* xsaves.s */ RAW(0f) RAW(c7) RAW(28) @@ -139599,7 +139599,7 @@ GLOBAL_LABEL(FUNCNAME:) /* xrstors.s */ RAW(0f) RAW(c7) RAW(18) RAW(0f) RAW(c7) RAW(1b) - END_OF_SUBTEST_MARKER + END_OF_SUBTEST_MARKER /* TODO i#5505: Move the following back under * arch_13.s in a separate PR to keep the huge From a26138e562bc3324f1244af6285ba3f3c24aa7bf Mon Sep 17 00:00:00 2001 From: Abhinav Anil Sharma Date: Fri, 1 Dec 2023 17:33:59 -0500 Subject: [PATCH 3/4] Remove disabled xsaves test that is already included in new ones. --- third_party/binutils/test_decenc/test_decenc_x86.asm | 4 +--- third_party/binutils/test_decenc/test_decenc_x86_64.asm | 4 +--- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/third_party/binutils/test_decenc/test_decenc_x86.asm b/third_party/binutils/test_decenc/test_decenc_x86.asm index 12519a191ef..2121e0c0ba8 100644 --- a/third_party/binutils/test_decenc/test_decenc_x86.asm +++ b/third_party/binutils/test_decenc/test_decenc_x86.asm @@ -304,8 +304,6 @@ GLOBAL_LABEL(FUNCNAME:) /* FIXME i3577: clzero, AMD only. */ /* RAW(0f) RAW(01) RAW(fc) */ RAW(0f) RAW(c7) RAW(21) - /* xsaves, CPL 0 instruction. */ - /* RAW(0f) RAW(c7) RAW(29) */ RAW(66) RAW(0f) RAW(ae) RAW(39) /* monitorx, AMD only. */ RAW(0f) RAW(01) RAW(fa) @@ -139590,7 +139588,7 @@ GLOBAL_LABEL(FUNCNAME:) RAW(7b) RAW(00) RAW(00) RAW(00) END_OF_SUBTEST_MARKER - /* xsaves.s */ + /* xsaves.s CPL 0 instruction */ RAW(0f) RAW(c7) RAW(28) RAW(0f) RAW(c7) RAW(ac) RAW(f4) RAW(c0) RAW(1d) RAW(fe) RAW(ff) diff --git a/third_party/binutils/test_decenc/test_decenc_x86_64.asm b/third_party/binutils/test_decenc/test_decenc_x86_64.asm index c065c791307..a25e4f02bce 100644 --- a/third_party/binutils/test_decenc/test_decenc_x86_64.asm +++ b/third_party/binutils/test_decenc/test_decenc_x86_64.asm @@ -231,8 +231,6 @@ GLOBAL_LABEL(FUNCNAME:) RAW(48) RAW(0f) RAW(c7) RAW(21) RAW(48) - /* xsaves, CPL 0 instruction. */ - /* RAW(0f) RAW(c7) RAW(29) */ RAW(66) RAW(0f) RAW(ae) RAW(39) /* monitorx, AMD only. */ RAW(0f) RAW(01) RAW(fa) @@ -106651,7 +106649,7 @@ GLOBAL_LABEL(FUNCNAME:) RAW(62) RAW(b2) RAW(5d) RAW(08) RAW(53) RAW(d6) RAW(62) RAW(d2) RAW(5d) RAW(08) RAW(50) RAW(d4) - /* x86_64_xsaves.s */ + /* x86_64_xsaves.s CPL 0 instruction */ RAW(0f) RAW(c7) RAW(28) RAW(0f) RAW(c7) RAW(ac) RAW(f0) RAW(23) RAW(01) RAW(00) RAW(00) From ab707f7e4c4ac19b3955bb8a3552ae75bd40b512 Mon Sep 17 00:00:00 2001 From: Abhinav Anil Sharma Date: Sat, 2 Dec 2023 22:52:44 -0500 Subject: [PATCH 4/4] Add more variants of xrstors/xsaves to tests. --- .../binutils/test_decenc/drdecode_decenc_x86.expect | 6 ++++++ .../test_decenc/drdecode_decenc_x86_64.expect | 10 ++++++++++ third_party/binutils/test_decenc/test_decenc_x86.asm | 7 +++++++ .../binutils/test_decenc/test_decenc_x86_64.asm | 11 +++++++++++ 4 files changed, 34 insertions(+) diff --git a/third_party/binutils/test_decenc/drdecode_decenc_x86.expect b/third_party/binutils/test_decenc/drdecode_decenc_x86.expect index 9e3d1dd386a..0bcc5bfe599 100644 --- a/third_party/binutils/test_decenc/drdecode_decenc_x86.expect +++ b/third_party/binutils/test_decenc/drdecode_decenc_x86.expect @@ -138779,6 +138779,8 @@ test_s: 90 nop 90 nop 0f c7 28 xsaves (%eax) + 0f c7 69 37 xsaves 0x37(%ecx) + 0f c7 2c 71 xsaves (%ecx,%esi,2) 0f c7 ac f4 c0 1d fe xsaves -0x0001e240(%esp,%esi,8) ff 90 nop @@ -138799,6 +138801,10 @@ test_s: 90 nop 0f c7 18 xrstors (%eax) 0f c7 1b xrstors (%ebx) + 0f c7 59 37 xrstors 0x37(%ecx) + 0f c7 1c 71 xrstors (%ecx,%esi,2) + 0f c7 9c f0 23 01 00 xrstors 0x00000123(%eax,%esi,8) + 00 90 nop 90 nop 90 nop diff --git a/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect b/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect index 9bfd3206976..51aaf58db02 100644 --- a/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect +++ b/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect @@ -102827,18 +102827,28 @@ test_x86_64_s: 62 b2 5d 08 53 d6 vpdpwssds %xmm4, %xmm22, %xmm2 {%k0} 62 d2 5d 08 50 d4 vpdpbusd %xmm4, %xmm12, %xmm2 {%k0} 0f c7 28 xsaves (%rax) + 0f c7 69 37 xsaves 0x37(%rcx) + 42 0f c7 2c 01 xsaves (%rcx,%r8) 0f c7 ac f0 23 01 00 xsaves 0x00000123(%rax,%rsi,8) 00 48 0f c7 28 xsaves64 (%rax) + 48 0f c7 69 37 xsaves64 0x37(%rcx) + 4a 0f c7 2c 01 xsaves64 (%rcx,%r8) 4a 0f c7 ac f0 23 01 xsaves64 0x00000123(%rax,%r14,8) 00 00 0f c7 18 xrstors (%rax) + 0f c7 59 37 xrstors 0x37(%rcx) 41 0f c7 18 xrstors (%r8) 41 0f c7 1c 00 xrstors (%r8,%rax) 42 0f c7 1c 00 xrstors (%rax,%r8) + 0f c7 9c f0 23 01 00 xrstors 0x00000123(%rax,%rsi,8) + 00 43 0f c7 1c 38 xrstors (%r8,%r15) 48 0f c7 18 xrstors64 (%rax) + 48 0f c7 59 37 xrstors64 0x37(%rcx) 49 0f c7 18 xrstors64 (%r8) + 48 0f c7 9c f0 23 01 xrstors64 0x00000123(%rax,%rsi,8) + 00 00 49 0f c7 1c 00 xrstors64 (%r8,%rax) 4a 0f c7 1c 00 xrstors64 (%rax,%r8) 4b 0f c7 1c 38 xrstors64 (%r8,%r15) diff --git a/third_party/binutils/test_decenc/test_decenc_x86.asm b/third_party/binutils/test_decenc/test_decenc_x86.asm index 2121e0c0ba8..7457a389868 100644 --- a/third_party/binutils/test_decenc/test_decenc_x86.asm +++ b/third_party/binutils/test_decenc/test_decenc_x86.asm @@ -139590,6 +139590,8 @@ GLOBAL_LABEL(FUNCNAME:) /* xsaves.s CPL 0 instruction */ RAW(0f) RAW(c7) RAW(28) + RAW(0f) RAW(c7) RAW(69) RAW(37) + RAW(0f) RAW(c7) RAW(2c) RAW(71) RAW(0f) RAW(c7) RAW(ac) RAW(f4) RAW(c0) RAW(1d) RAW(fe) RAW(ff) END_OF_SUBTEST_MARKER @@ -139597,6 +139599,11 @@ GLOBAL_LABEL(FUNCNAME:) /* xrstors.s */ RAW(0f) RAW(c7) RAW(18) RAW(0f) RAW(c7) RAW(1b) + RAW(0f) RAW(c7) RAW(59) RAW(37) + RAW(0f) RAW(c7) RAW(1c) RAW(71) + RAW(0f) RAW(c7) RAW(9c) RAW(f0) RAW(23) + RAW(01) RAW(00) RAW(00) + END_OF_SUBTEST_MARKER /* TODO i#5505: Move the following back under diff --git a/third_party/binutils/test_decenc/test_decenc_x86_64.asm b/third_party/binutils/test_decenc/test_decenc_x86_64.asm index a25e4f02bce..644ea3c9e2e 100644 --- a/third_party/binutils/test_decenc/test_decenc_x86_64.asm +++ b/third_party/binutils/test_decenc/test_decenc_x86_64.asm @@ -106651,20 +106651,31 @@ GLOBAL_LABEL(FUNCNAME:) /* x86_64_xsaves.s CPL 0 instruction */ RAW(0f) RAW(c7) RAW(28) + RAW(0f) RAW(c7) RAW(69) RAW(37) + RAW(42) RAW(0f) RAW(c7) RAW(2c) RAW(01) RAW(0f) RAW(c7) RAW(ac) RAW(f0) RAW(23) RAW(01) RAW(00) RAW(00) RAW(48) RAW(0f) RAW(c7) RAW(28) + RAW(48) RAW(0f) RAW(c7) RAW(69) RAW(37) + RAW(4a) RAW(0f) RAW(c7) RAW(2c) RAW(01) RAW(4a) RAW(0f) RAW(c7) RAW(ac) RAW(f0) RAW(23) RAW(01) RAW(00) RAW(00) /* x86_64_xrstors.s */ + RAW(0f) RAW(c7) RAW(18) + RAW(0f) RAW(c7) RAW(59) RAW(37) RAW(41) RAW(0f) RAW(c7) RAW(18) RAW(41) RAW(0f) RAW(c7) RAW(1c) RAW(00) RAW(42) RAW(0f) RAW(c7) RAW(1c) RAW(00) + RAW(0f) RAW(c7) RAW(9c) RAW(f0) RAW(23) + RAW(01) RAW(00) RAW(00) RAW(43) RAW(0f) RAW(c7) RAW(1c) RAW(38) RAW(48) RAW(0f) RAW(c7) RAW(18) + RAW(48) RAW(0f) RAW(c7) RAW(59) RAW(37) RAW(49) RAW(0f) RAW(c7) RAW(18) + RAW(48) RAW(0f) RAW(c7) RAW(9c) RAW(f0) + RAW(23) RAW(01) RAW(00) RAW(00) RAW(49) RAW(0f) RAW(c7) RAW(1c) RAW(00) RAW(4a) RAW(0f) RAW(c7) RAW(1c) RAW(00) RAW(4b) RAW(0f) RAW(c7) RAW(1c) RAW(38)