CMSIS-NN on Cortex A72/ Cortex -R5F /C7X-DSP #1553
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@felix-johnny et al, can you comment on this one, please? |
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@prabhatsharmaa . Thanks for reaching out. CMSIS-NN (usually)has three sections in each function.
Technically you could choose to use options 1 and 2 with an Arm Cortex-A CPU..You would have to fix certain custom intrinsics that are defined in CMSIS-Core if using option 2. With the Cortex-A72, using the reference code(C) might be a better option as the compiler can then possibly generate vector instructions for some of the core operations. For Arm Cortex-R CPU you should be able to compile using option 1. I am not sure about option 2. That said, CMSIS-NN is a library, so you'll need a framework like TensorFlow for Microcontroller(TFLM) where this is integrated. I don't think TFLM has support for Cortex-A CPUs in their upstream. |
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Hello,
I understand that CMSIS-NN is built for Cortex-M. I would like to understand if it is possible to run CMSIS-NN on Cortex A72/ Cortex -R5F /C7X-DSP by cross compilation or by any other method?
I have a controller which doesn't have a Cortex M core. So exploring option to run CMSIS-NN in available cores.
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