forked from mchehab/rasdaemon
-
Notifications
You must be signed in to change notification settings - Fork 2
/
non-standard-ampere.h
180 lines (162 loc) · 4.32 KB
/
non-standard-ampere.h
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (c) 2020, Ampere Computing LLC.
*/
#ifndef __NON_STANDARD_AMPERE_H
#define __NON_STANDARD_AMPERE_H
#include <traceevent/event-parse.h>
#include "types.h"
struct ras_ns_ev_decoder;
#define SOCKET_NUM(x) (((x) >> 14) & 0x3)
#define PAYLOAD_TYPE(x) (((x) >> 6) & 0x3)
#define TYPE(x) ((x) & 0x3f)
#define INSTANCE(x) ((x) & 0x3fff)
#define AMP_PAYLOAD0_BUF_LEN 1024
#define PAYLOAD_TYPE_0 0x00
#define PAYLOAD_TYPE_1 0x01
#define PAYLOAD_TYPE_2 0x02
#define PAYLOAD_TYPE_3 0x03
/* Ampere RAS Error type definitions */
#define AMP_RAS_TYPE_CPU 0
#define AMP_RAS_TYPE_MCU 1
#define AMP_RAS_TYPE_MESH 2
#define AMP_RAS_TYPE_2P_LINK_QS 3
#define AMP_RAS_TYPE_2P_LINK_MQ 4
#define AMP_RAS_TYPE_GIC 5
#define AMP_RAS_TYPE_SMMU 6
#define AMP_RAS_TYPE_PCIE_AER 7
#define AMP_RAS_TYPE_PCIE_RASDP 8
#define AMP_RAS_TYPE_OCM 9
#define AMP_RAS_TYPE_SMPRO 10
#define AMP_RAS_TYPE_PMPRO 11
#define AMP_RAS_TYPE_ATF_FW 12
#define AMP_RAS_TYPE_SMPRO_FW 13
#define AMP_RAS_TYPE_PMPRO_FW 14
#define AMP_RAS_TYPE_BERT 63
/* ARMv8 RAS Compliant Error Record(APEI and BMC Reporting)*/
struct amp_payload0_type_sec {
uint8_t type;
uint8_t subtype;
uint16_t instance;
uint32_t err_status;
uint64_t err_addr;
uint64_t err_misc_0;
uint64_t err_misc_1;
uint64_t err_misc_2;
uint64_t err_misc_3;
};
/*PCIe AER format*/
struct amp_payload1_type_sec {
uint8_t type;
uint8_t subtype;
uint16_t instance;
uint32_t uncore_status;
uint32_t uncore_mask;
uint32_t uncore_sev;
uint32_t core_status;
uint32_t core_mask;
uint32_t root_err_cmd;
uint32_t root_status;
uint32_t src_id;
uint32_t reserved1;
uint64_t reserved2;
};
/*PCIe RAS Data Path(RASDP) format */
struct amp_payload2_type_sec {
uint8_t type;
uint8_t subtype;
uint16_t instance;
uint32_t ce_register;
uint32_t ce_location;
uint32_t ce_addr;
uint32_t ue_register;
uint32_t ue_location;
uint32_t ue_addr;
uint32_t reserved1;
uint64_t reserved2;
uint64_t reserved3;
};
/*Firmware-Specific Data(ATF,SMPro, and BERT) */
struct amp_payload3_type_sec {
uint8_t type;
uint8_t subtype;
uint16_t instance;
uint32_t fw_speci_data0;
uint64_t fw_speci_data1;
uint64_t fw_speci_data2;
uint64_t fw_speci_data3;
uint64_t fw_speci_data4;
uint64_t fw_speci_data5;
};
enum amp_oem_data_type {
AMP_OEM_DATA_TYPE_INT,
AMP_OEM_DATA_TYPE_INT64,
AMP_OEM_DATA_TYPE_TEXT,
};
enum {
AMP_PAYLOAD0_FIELD_ID,
AMP_PAYLOAD0_FIELD_TIMESTAMP,
AMP_PAYLOAD0_FIELD_TYPE,
AMP_PAYLOAD0_FIELD_SUB_TYPE,
AMP_PAYLOAD0_FIELD_INS,
AMP_PAYLOAD0_FIELD_SOCKET_NUM,
AMP_PAYLOAD0_FIELD_STATUS_REG,
AMP_PAYLOAD0_FIELD_ADDR_REG,
AMP_PAYLOAD0_FIELD_MISC0,
AMP_PAYLOAD0_FIELD_MISC1,
AMP_PAYLOAD0_FIELD_MISC2,
AMP_PAYLOAD0_FIELD_MISC3,
};
enum {
AMP_PAYLOAD1_FIELD_ID,
AMP_PAYLOAD1_FIELD_TIMESTAMP,
AMP_PAYLOAD1_FIELD_TYPE,
AMP_PAYLOAD1_FIELD_SUB_TYPE,
AMP_PAYLOAD1_FIELD_INS,
AMP_PAYLOAD1_FIELD_SOCKET_NUM,
AMP_PAYLOAD1_FIELD_UNCORE_ERR_STATUS,
AMP_PAYLOAD1_FIELD_UNCORE_ERR_MASK,
AMP_PAYLOAD1_FIELD_UNCORE_ERR_SEV,
AMP_PAYLOAD1_FIELD_CORE_ERR_STATUS,
AMP_PAYLOAD1_FIELD_CORE_ERR_MASK,
AMP_PAYLOAD1_FIELD_ROOT_ERR_CMD,
AMP_PAYLOAD1_FIELD_ROOT_ERR_STATUS,
AMP_PAYLOAD1_FIELD_SRC_ID,
AMP_PAYLOAD1_FIELD_RESERVED1,
AMP_PAYLOAD1_FIELD_RESERVED2,
};
enum {
AMP_PAYLOAD2_FIELD_ID,
AMP_PAYLOAD2_FIELD_TIMESTAMP,
AMP_PAYLOAD2_FIELD_TYPE,
AMP_PAYLOAD2_FIELD_SUB_TYPE,
AMP_PAYLOAD2_FIELD_INS,
AMP_PAYLOAD2_FIELD_SOCKET_NUM,
AMP_PAYLOAD2_FIELD_CE_REPORT_REG,
AMP_PAYLOAD2_FIELD_CE_LOACATION,
AMP_PAYLOAD2_FIELD_CE_ADDR,
AMP_PAYLOAD2_FIELD_UE_REPORT_REG,
AMP_PAYLOAD2_FIELD_UE_LOCATION,
AMP_PAYLOAD2_FIELD_UE_ADDR,
AMP_PAYLOAD2_FIELD_RESERVED1,
AMP_PAYLOAD2_FIELD_RESERVED2,
AMP_PAYLOAD2_FIELD_RESERVED3,
};
enum {
AMP_PAYLOAD3_FIELD_ID,
AMP_PAYLOAD3_FIELD_TIMESTAMP,
AMP_PAYLOAD3_FIELD_TYPE,
AMP_PAYLOAD3_FIELD_SUB_TYPE,
AMP_PAYLOAD3_FIELD_INS,
AMP_PAYLOAD3_FIELD_SOCKET_NUM,
AMP_PAYLOAD3_FIELD_FW_SPEC_DATA0,
AMP_PAYLOAD3_FIELD_FW_SPEC_DATA1,
AMP_PAYLOAD3_FIELD_FW_SPEC_DATA2,
AMP_PAYLOAD3_FIELD_FW_SPEC_DATA3,
AMP_PAYLOAD3_FIELD_FW_SPEC_DATA4,
AMP_PAYLOAD3_FIELD_FW_SPEC_DATA5
};
void decode_amp_payload0_err_regs(struct ras_ns_ev_decoder *ev_decoder,
struct trace_seq *s,
const struct amp_payload0_type_sec *err);
#endif